Index: working_vm/vm/jitrino/src/codegenerator/ia32/Ia32IRManager.cpp =================================================================== --- working_vm/vm/jitrino/src/codegenerator/ia32/Ia32IRManager.cpp £¨ÐÞ¶©°æ 713911£© +++ working_vm/vm/jitrino/src/codegenerator/ia32/Ia32IRManager.cpp £¨¹¤×÷¿½±´£© @@ -1324,8 +1324,13 @@ U_32 opndCount=getOpndCount(); for (U_32 i=0; iisPlacedIn(regKind)) - gpTotalRegUsage |= getRegMask(opnd->getRegName()); + if (opnd->isPlacedIn(regKind)) { + RegName reg = opnd->getRegName(); + unsigned mask = getRegMask(reg); + if ((reg == RegName_AH) || (reg == RegName_CH) || (reg == RegName_DH) || (reg == RegName_BH)) + mask >>= 4; + gpTotalRegUsage |= mask; + } } } //_________________________________________________________________________________________________ Index: working_vm/vm/jitrino/src/codegenerator/ia32/Ia32I8Lowerer.cpp =================================================================== --- working_vm/vm/jitrino/src/codegenerator/ia32/Ia32I8Lowerer.cpp £¨ÐÞ¶©°æ 713911£© +++ working_vm/vm/jitrino/src/codegenerator/ia32/Ia32I8Lowerer.cpp £¨¹¤×÷¿½±´£© @@ -289,6 +289,7 @@ for (Inst* inst = (Inst*)node->getFirstInst(),*nextInst=NULL; inst!=NULL; inst = nextInst) { nextInst = inst->getNextInst(); U_32 defCount = inst->getOpndCount(Inst::OpndRole_InstLevel|Inst::OpndRole_Def); + U_32 useCount = inst->getOpndCount(Inst::OpndRole_InstLevel|Inst::OpndRole_Use); if(inst->getMnemonic() == Mnemonic_CDQ) { if (inst->getNextInst()!=NULL && inst->getNextInst()->getMnemonic() == Mnemonic_IDIV) { continue; @@ -310,8 +311,17 @@ tmpInst->insertAfter(inst); inst->unlink(); inst = tmpInst; - } - } + } else { + if (cdq) { + Opnd* defCDQ = cdq->getOpnd(0); + for (U_32 i=defCount;igetOpnd(i)) { + cdq = NULL; + break; + } + } + } + } } } checkIR(irManager); Index: working_vm/vm/jitrino/src/codegenerator/ia32/Ia32PeepHole.cpp =================================================================== --- working_vm/vm/jitrino/src/codegenerator/ia32/Ia32PeepHole.cpp £¨ÐÞ¶©°æ 713911£© +++ working_vm/vm/jitrino/src/codegenerator/ia32/Ia32PeepHole.cpp £¨¹¤×÷¿½±´£© @@ -484,7 +484,8 @@ if (step1 && next->getMnemonic() == Mnemonic_MOV) { Opnd *movopnd1, *movopnd2, *nextmovopnd1, *nextmovopnd2; - if (inst->getKind() == Inst::Kind_CopyPseudoInst) + bool isInstCopyPseudo = (inst->getKind() == Inst::Kind_CopyPseudoInst); + if (isInstCopyPseudo) { movopnd1 = inst->getOpnd(0); movopnd2 = inst->getOpnd(1); @@ -496,7 +497,8 @@ movopnd1 = inst->getOpnd(movdefs.begin()); movopnd2 = inst->getOpnd(movuses.begin()); } - if (next->getKind() == Inst::Kind_CopyPseudoInst) + bool isNextCopyPseudo = (next->getKind() == Inst::Kind_CopyPseudoInst); + if (isNextCopyPseudo) { nextmovopnd1 = next->getOpnd(0); nextmovopnd2 = next->getOpnd(1); @@ -522,7 +524,10 @@ bool dstNotUsed = !ls.getBit(movopnd1->getId()); if (dstNotUsed) { - irManager->newInst(Mnemonic_MOV, nextmovopnd1, movopnd2)->insertAfter(inst); + if (isInstCopyPseudo && isNextCopyPseudo) + irManager->newCopyPseudoInst(Mnemonic_MOV, nextmovopnd1, movopnd2)->insertAfter(inst); + else + irManager->newInst(Mnemonic_MOV, nextmovopnd1, movopnd2)->insertAfter(inst); inst->unlink(); next->unlink(); return Changed_Node; @@ -603,7 +608,6 @@ return Changed_Nothing; } - PeepHoleOpt::Changed PeepHoleOpt::handleInst_CMP(Inst* inst) { assert(inst->getMnemonic()==Mnemonic_CMP); Index: working_vm/vm/jitrino/src/codegenerator/ia32/Ia32RegAlloc3.cpp =================================================================== --- working_vm/vm/jitrino/src/codegenerator/ia32/Ia32RegAlloc3.cpp £¨ÐÞ¶©°æ 713911£© +++ working_vm/vm/jitrino/src/codegenerator/ia32/Ia32RegAlloc3.cpp £¨¹¤×÷¿½±´£© @@ -168,6 +168,7 @@ int duplicates (Indexes* list, BoolMatrix& matrix, int x0, int x1); void pruneGraph (); bool shouldPrune (const Opndx&) const; + RegAlloc3::RegMask occupiedReg (OpndSize, OpndSize, RegAlloc3::RegMask); bool assignRegs (); bool assignReg (Opndx&); void spillRegs (); @@ -1232,7 +1233,24 @@ return spilled == 0; } +RegAlloc3::RegMask RegAlloc3::occupiedReg (OpndSize tgtSize, OpndSize adjSize, RegAlloc3::RegMask adjMask) { +#if !defined(_EM64T_) + if (!((tgtSize != adjSize) && ((tgtSize == OpndSize_8) || (adjSize == OpndSize_8)))) +#endif + return adjMask; + RegMask val = adjMask; + if (tgtSize == OpndSize_8) { + if (adjMask <= 8) //for AH, CH, DH, BH + val |= adjMask<<4; + } else if (adjSize == OpndSize_8) { + if (adjMask >= 16) //for AH, CH, DH, BH + val >>= 4; + } + return val; +} + + bool RegAlloc3::assignReg (Opndx& opndx) { RegMask alloc = 0; @@ -1242,7 +1260,10 @@ { Opndx& opndz = graph.at(*i); if (opndz.ridx == opndx.ridx) - alloc |= opndz.alloc; + if (opndz.opnd != NULL) //for operand nodes + alloc |= occupiedReg(opndx.opnd->getSize(), opndz.opnd->getSize(), opndz.alloc); + else //for color nodes + alloc |= occupiedReg(opndx.opnd->getSize(), OpndSize_32, opndz.alloc); } if ((alloc = opndx.avail & ~alloc) == 0)