Index: working_vm/vm/port/src/encoder/ia32_em64t/enc_defs.h =================================================================== --- working_vm/vm/port/src/encoder/ia32_em64t/enc_defs.h £¨ÐÞ¶©°æ 689725£© +++ working_vm/vm/port/src/encoder/ia32_em64t/enc_defs.h £¨¹¤×÷¿½±´£© @@ -617,12 +617,12 @@ CCM(SET,NLE), CCM(SET,G), Mnemonic_SAL, Mnemonic_SHL=Mnemonic_SAL,// Shift left -Mnemonic_SAR, // Unsigned shift right +Mnemonic_SAR, // Shift right Mnemonic_ROR, // Rotate right Mnemonic_RCR, // Rotate right through CARRY flag Mnemonic_ROL, // Rotate left Mnemonic_RCL, // Rotate left through CARRY flag -Mnemonic_SHR, // Signed shift right +Mnemonic_SHR, // Unsigned shift right Mnemonic_SHRD, // Double Precision Shift Right Mnemonic_SHLD, // Double Precision Shift Left Index: working_vm/vm/jitrino/src/optimizer/simplifier.cpp =================================================================== --- working_vm/vm/jitrino/src/optimizer/simplifier.cpp £¨ÐÞ¶©°æ 689725£© +++ working_vm/vm/jitrino/src/optimizer/simplifier.cpp £¨¹¤×÷¿½±´£© @@ -1445,7 +1445,7 @@ src2->getInst()->asConstInst(), mod.isSigned()); -#ifdef _IPF_ + const OptimizerFlags& optimizerFlags = irManager.getOptimizerFlags(); // // further ops only for integers @@ -1485,92 +1485,123 @@ return opnd; // convert other cases to MulHi and shift if lower_divconst set - if (optimizerFlags.lower_divconst && - (dstType->tag == Type::Int32) && - mod.isSigned()) { - - I_32 denom = value2.i4; - // note that 0 and 1 were handled above - if (denom == -1) { - // convert to neg - Opnd *res = genNeg(dstType, src1)->getDst(); - return res; - } else if (isPowerOf2(denom)) { - // convert to shift and such - I_32 absdenom = (denom < 0) ? -denom : denom; - int k = whichPowerOf2(absdenom); - Opnd *kminus1 = genLdConstant((I_32)(k - 1))->getDst(); - // make k-1 copies of the sign bit - Opnd *shiftTheSign = genShr(dstType, - Modifier(SignedOp)|Modifier(ShiftMask_None), - src1, kminus1)->getDst(); - // we 32-k zeros in on left to put copies of sign on right - Opnd *t32minusk = genLdConstant((I_32)(32-k))->getDst(); - // if (n<0), this is 2^k-1, else 0 - Opnd *kminus1ones = genShr(dstType, - Modifier(UnsignedOp)|Modifier(ShiftMask_None), - shiftTheSign, t32minusk)->getDst(); - Opnd *added = genAdd(dstType, Modifier(Overflow_None)|Modifier(Exception_Never)|Modifier(Strict_No), - src1, kminus1ones)->getDst(); - Opnd *kOpnd = genLdConstant((I_32)k)->getDst(); - Opnd *res = genShr(dstType, Modifier(SignedOp)|Modifier(ShiftMask_None), - added, kOpnd)->getDst(); - if (denom != absdenom) { // ((denom < 0) && (k < 31)) - res = genNeg(dstType, res)->getDst(); - } - return res; - } else { - // convert to MulHi and such - I_32 magicNum, shiftBy; - getMagic(denom, &magicNum, &shiftBy); + if (optimizerFlags.lower_divconst && mod.isSigned()) { + if (dstType->tag == Type::Int32) { + I_32 denom = value2.i4; + // note that 0 and 1 were handled above + if (denom == -1) { + // convert to neg + Opnd *res = genNeg(dstType, src1)->getDst(); + return res; + } else if (isPowerOf2(denom)) { + // convert to shift and such + I_32 absdenom = (denom < 0) ? -denom : denom; + int k = whichPowerOf2(absdenom); + Opnd *kminus1 = genLdConstant((I_32)(k - 1))->getDst(); + // make k-1 copies of the sign bit + Opnd *shiftTheSign = genShr(dstType, + Modifier(SignedOp)|Modifier(ShiftMask_None), + src1, kminus1)->getDst(); + // we 32-k zeros in on left to put copies of sign on right + Opnd *t32minusk = genLdConstant((I_32)(32-k))->getDst(); + // if (n<0), this is 2^k-1, else 0 + Opnd *kminus1ones = genShr(dstType, + Modifier(UnsignedOp)|Modifier(ShiftMask_None), + shiftTheSign, t32minusk)->getDst(); + Opnd *added = genAdd(dstType, Modifier(Overflow_None)|Modifier(Exception_Never)|Modifier(Strict_No), + src1, kminus1ones)->getDst(); + Opnd *kOpnd = genLdConstant((I_32)k)->getDst(); + Opnd *res = genShr(dstType, Modifier(SignedOp)|Modifier(ShiftMask_None), + added, kOpnd)->getDst(); + if (denom != absdenom) { // ((denom < 0) && (k < 31)) + res = genNeg(dstType, res)->getDst(); + } + return res; + } else { + // convert to MulHi and such + I_32 magicNum, shiftBy; + getMagic(denom, &magicNum, &shiftBy); - Opnd *mulRes; - if (optimizerFlags.use_mulhi) { - Opnd *magicOpnd = genLdConstant(magicNum)->getDst(); - mulRes = genMulHi(dstType, SignedOp, magicOpnd, - src1)->getDst(); - } else { - Opnd *magicOpnd = genLdConstant((int64)magicNum)->getDst(); - TypeManager &tm = irManager.getTypeManager(); - Type *dstType64 = tm.getInt64Type(); - Opnd *src64 = genConv(dstType64, Type::Int64, Modifier(Overflow_None)|Modifier(Exception_Never)|Modifier(Strict_No), + Opnd *mulRes; + if (optimizerFlags.use_mulhi) { + Opnd *magicOpnd = genLdConstant(magicNum)->getDst(); + mulRes = genMulHi(dstType, SignedOp, magicOpnd, src1)->getDst(); - Opnd *mulRes64 = genMul(dstType64, Modifier(Overflow_None)|Modifier(Exception_Never)|Modifier(Strict_No), magicOpnd, - src64)->getDst(); - Opnd *constant32 = genLdConstant((I_32)32)->getDst(); - Opnd *mulRes64h = genShr(dstType64, - Modifier(SignedOp)|Modifier(ShiftMask_None), - mulRes64, - constant32)->getDst(); - mulRes = genConv(dstType, Type::Int32, Modifier(Overflow_None)|Modifier(Exception_Never)|Modifier(Strict_No), - mulRes64h)->getDst(); + } else { + Opnd *magicOpnd = genLdConstant((int64)magicNum)->getDst(); + TypeManager &tm = irManager.getTypeManager(); + Type *dstType64 = tm.getInt64Type(); + Opnd *src64 = genConv(dstType64, Type::Int64, Modifier(Overflow_None)|Modifier(Exception_Never)|Modifier(Strict_No), + src1)->getDst(); + Opnd *mulRes64 = genMul(dstType64, Modifier(Overflow_None)|Modifier(Exception_Never)|Modifier(Strict_No), magicOpnd, + src64)->getDst(); + Opnd *constant32 = genLdConstant((I_32)32)->getDst(); + Opnd *mulRes64h = genShr(dstType64, + Modifier(SignedOp)|Modifier(ShiftMask_None), + mulRes64, + constant32)->getDst(); + mulRes = genConv(dstType, Type::Int32, Modifier(Overflow_None)|Modifier(Exception_Never)|Modifier(Strict_No), + mulRes64h)->getDst(); + } + // need to adjust for overflow in magicNum + // this is indicated by sign which differs from + // the denom. + if ((denom > 0) && (magicNum < 0)) { + mulRes = genAdd(dstType, Modifier(Overflow_None)|Modifier(Exception_Never)|Modifier(Strict_No), + mulRes, src1)->getDst(); + } else if ((denom < 0) && (magicNum > 0)) { + mulRes = genSub(dstType, Modifier(Overflow_None)|Modifier(Exception_Never)|Modifier(Strict_No), + mulRes, src1)->getDst(); + } + Opnd *shiftByOpnd = genLdConstant(shiftBy)->getDst(); + mulRes = genShr(dstType, Modifier(SignedOp)|Modifier(ShiftMask_None), + mulRes, shiftByOpnd)->getDst(); + Opnd *thirtyOne = genLdConstant((I_32)31)->getDst(); + Opnd *oneIfNegative = genShr(dstType, + Modifier(UnsignedOp)|Modifier(ShiftMask_None), + ((denom < 0) + ? mulRes + : src1), + thirtyOne)->getDst(); + Opnd *res = genAdd(dstType, Modifier(Overflow_None)|Modifier(Exception_Never)|Modifier(Strict_No), mulRes, oneIfNegative)->getDst(); + return res; } - // need to adjust for overflow in magicNum - // this is indicated by sign which differs from - // the denom. - if ((denom > 0) && (magicNum < 0)) { - mulRes = genAdd(dstType, Modifier(Overflow_None)|Modifier(Exception_Never)|Modifier(Strict_No), - mulRes, src1)->getDst(); - } else if ((denom < 0) && (magicNum > 0)) { - mulRes = genSub(dstType, Modifier(Overflow_None)|Modifier(Exception_Never)|Modifier(Strict_No), - mulRes, src1)->getDst(); + } else if (dstType->tag == Type::Int64) { + I_64 denom = value2.i8; + // note that 0 and 1 were handled above + if (denom == -1) { + // convert to neg + Opnd *res = genNeg(dstType, src1)->getDst(); + return res; + } else if (isPowerOf2(denom)) { + // convert to shift and such + I_64 absdenom = (denom < 0) ? -denom : denom; + int k = whichPowerOf2(absdenom); + Opnd *kminus1 = genLdConstant((I_64)(k - 1))->getDst(); + // make k-1 copies of the sign bit + Opnd *shiftTheSign = genShr(dstType, + Modifier(SignedOp)|Modifier(ShiftMask_None), + src1, kminus1)->getDst(); + // we 64-k zeros in on left to put copies of sign on right + Opnd *t64minusk = genLdConstant((I_64)(64-k))->getDst(); + // if (n<0), this is 2^k-1, else 0 + Opnd *kminus1ones = genShr(dstType, + Modifier(UnsignedOp)|Modifier(ShiftMask_None), + shiftTheSign, t64minusk)->getDst(); + Opnd *added = genAdd(dstType, Modifier(Overflow_None)|Modifier(Exception_Never)|Modifier(Strict_No), + src1, kminus1ones)->getDst(); + Opnd *kOpnd = genLdConstant((I_64)k)->getDst(); + Opnd *res = genShr(dstType, Modifier(SignedOp)|Modifier(ShiftMask_None), + added, kOpnd)->getDst(); + if (denom != absdenom) { // ((denom < 0) && (k < 63)) + res = genNeg(dstType, res)->getDst(); + } + return res; } - Opnd *shiftByOpnd = genLdConstant(shiftBy)->getDst(); - mulRes = genShr(dstType, Modifier(SignedOp)|Modifier(ShiftMask_None), - mulRes, shiftByOpnd)->getDst(); - Opnd *thirtyOne = genLdConstant((I_32)31)->getDst(); - Opnd *oneIfNegative = genShr(dstType, - Modifier(UnsignedOp)|Modifier(ShiftMask_None), - ((denom < 0) - ? mulRes - : src1), - thirtyOne)->getDst(); - Opnd *res = genAdd(dstType, Modifier(Overflow_None)|Modifier(Exception_Never)|Modifier(Strict_No), mulRes, oneIfNegative)->getDst(); - return res; } } } -#endif + return NULL; } @@ -1593,7 +1624,7 @@ src1->getInst()->asConstInst(), src2->getInst()->asConstInst(), mod.isSigned()); -#ifdef _IPF_ + // // don't simplify floating point further // @@ -1686,7 +1717,7 @@ return remOpnd; } } -#endif + return NULL; } //-----------------------------------------------------------------------------