Index: vm/port/src/encoder/ia32_em64t/enc_tabl.cpp =================================================================== --- vm/port/src/encoder/ia32_em64t/enc_tabl.cpp (revision 632278) +++ vm/port/src/encoder/ia32_em64t/enc_tabl.cpp (working copy) @@ -1094,6 +1094,14 @@ END_MNEMONIC() +BEGIN_MNEMONIC(MOVAPD, MF_NONE, D_U ) +BEGIN_OPCODES() + {OpcodeInfo::all, {0x66, 0x0F, 0x28, _r}, {xmm64, xmm_m64}, D_U }, + {OpcodeInfo::all, {0x66, 0x0F, 0x29, _r}, {xmm_m64, xmm64}, D_U }, +END_OPCODES() +END_MNEMONIC() + + BEGIN_MNEMONIC(MOVSD, MF_NONE, D_U ) BEGIN_OPCODES() {OpcodeInfo::all, {0xF2, 0x0F, 0x10, _r}, {xmm64, xmm_m64}, D_U }, Index: vm/port/src/encoder/ia32_em64t/enc_defs.h =================================================================== --- vm/port/src/encoder/ia32_em64t/enc_defs.h (revision 632278) +++ vm/port/src/encoder/ia32_em64t/enc_defs.h (working copy) @@ -541,6 +541,7 @@ // MOVS is a special case: see encoding table for more details, Mnemonic_MOVS8, Mnemonic_MOVS16, Mnemonic_MOVS32, Mnemonic_MOVS64, // +Mnemonic_MOVAPD, // Move Scalar Double-Precision Floating-Point Value Mnemonic_MOVSD, // Move Scalar Double-Precision Floating-Point Value Mnemonic_MOVSS, // Move Scalar Single-Precision Floating-Point Values Mnemonic_MOVSX, // Move with Sign-Extension Index: vm/jitrino/src/codegenerator/ia32/Ia32IRManager.cpp =================================================================== --- vm/jitrino/src/codegenerator/ia32/Ia32IRManager.cpp (revision 632278) +++ vm/jitrino/src/codegenerator/ia32/Ia32IRManager.cpp (working copy) @@ -1153,7 +1153,10 @@ if (sourceByteSize==4){ return newInst(Mnemonic_MOVSS,targetOpnd, sourceOpnd); }else if (sourceByteSize==8){ - return newInst(Mnemonic_MOVSD,targetOpnd, sourceOpnd); + if(targetKind==OpndKind_XMMReg && sourceKind==OpndKind_XMMReg) + return newInst(Mnemonic_MOVAPD,targetOpnd, sourceOpnd); + else + return newInst(Mnemonic_MOVSD,targetOpnd, sourceOpnd); } }else if (targetKind==OpndKind_FPReg && sourceKind==OpndKind_Mem){ sourceOpnd->setMemOpndAlignment(Opnd::MemOpndAlignment_16); Index: vm/jitrino/src/codegenerator/ia32/Ia32PeepHole.cpp =================================================================== --- vm/jitrino/src/codegenerator/ia32/Ia32PeepHole.cpp (revision 632278) +++ vm/jitrino/src/codegenerator/ia32/Ia32PeepHole.cpp (working copy) @@ -218,6 +218,7 @@ case Mnemonic_MUL: return handleInst_MUL(inst); case Mnemonic_MOVSS: + case Mnemonic_MOVAPD: case Mnemonic_MOVSD: //return handleInst_SSEMov(inst); case Mnemonic_XORPS: Index: vm/jitrino/src/codegenerator/ia32/Ia32i586InstsExpansion.cpp =================================================================== --- vm/jitrino/src/codegenerator/ia32/Ia32i586InstsExpansion.cpp (revision 632278) +++ vm/jitrino/src/codegenerator/ia32/Ia32i586InstsExpansion.cpp (working copy) @@ -86,6 +86,7 @@ case Mnemonic_PXOR: case Mnemonic_MOVQ: case Mnemonic_MOVD: + case Mnemonic_MOVAPD: case Mnemonic_MOVSD: case Mnemonic_MOVSS: case Mnemonic_UCOMISD: @@ -251,6 +252,7 @@ case Mnemonic_MOVQ: case Mnemonic_MOVD: case Mnemonic_MOVSD: + case Mnemonic_MOVAPD: case Mnemonic_MOVSS: { if (op1->isPlacedIn(OpndKind_XMMReg)) {