Index: vm/port/src/encoder/ia32_em64t/dec_base.cpp =================================================================== --- vm/port/src/encoder/ia32_em64t/dec_base.cpp (revision 627739) +++ vm/port/src/encoder/ia32_em64t/dec_base.cpp (working copy) @@ -330,11 +330,10 @@ RegName index = RegName_Null; int disp = 0; unsigned scale = 0; - OpndSize reg_size = OpndSize_32; #ifdef _EM64T_ - if (NULL != rex && 0 != rex->w) - reg_size = OpndSize_64; + // All mnemonics that allow REX.W have REX.W in opcode + // Therefore REX.W is simply ignored, and opndDesc.size is used #endif if (modrm.mod == 3) { @@ -350,20 +349,20 @@ *pbuf += 1; scale = sib.scale == 0 ? 0 : (1< no index } if (sib.base != 5 && modrm.mod != 0) { - base = getRegName(OpndKind_GPReg, reg_size, EXTEND_REG(sib.base, b)); + base = getRegName(OpndKind_GPReg, opndDesc.size/*reg_size*/, EXTEND_REG(sib.base, b)); } else { // (sib.base == 5 && modrm.mod == 0) => no base } } else { if (modrm.mod != 0 || modrm.rm != 5) { - base = getRegName(OpndKind_GPReg, reg_size, EXTEND_REG(modrm.rm, b)); + base = getRegName(OpndKind_GPReg, opndDesc.size/*reg_size*/, EXTEND_REG(modrm.rm, b)); } else { // mod=0 && rm == 5 => only disp32