Index: jitrino/config/ia32/server.emconf =================================================================== --- jitrino/config/ia32/server.emconf (revision 542209) +++ jitrino/config/ia32/server.emconf (working copy) @@ -42,6 +42,16 @@ -XX:jit.JET_CLINIT.path= +#register allocator configuration +-XDjit.RA2.filter=- +-XDjit.RA2.path=bp_regalloc1,bp_regalloc2 +-XDjit.RA2.path.bp_regalloc1=bp_regalloc +-XDjit.RA2.path.bp_regalloc2=bp_regalloc +-XDjit.RA2.arg.bp_regalloc1.regs=ALL_GP +-XDjit.RA2.arg.bp_regalloc2.regs=ALL_XMM +-XDjit.RA3.filter=- +-XDjit.RA3.path=webmaker,cg_regalloc +-XDjit.RA3.arg.webmaker.calc=true -XX:jit.SD1_OPT.path=opt_init,translator,optimizer,hir2lir,codegen @@ -55,9 +65,6 @@ -XX:jit.SD1_OPT.arg.codegen.btr.insertCMOVs=no -XX:jit.SD1_OPT.arg.codegen.btr.removeConstCompare=yes --XX:jit.SD1_OPT.path.regalloc=webmaker,cg_regalloc,spillgen --XX:jit.SD1_OPT.arg.codegen.regalloc.webmaker.calc=true - -XX:jit.SD2_OPT.path=opt_init,translator,optimizer,hir2lir,codegen -XX:jit.SD2_OPT.path.optimizer=ssa,simplify,dce,uce,devirt_virtual,edge_annotate,unguard,devirt_intf,inline,uce,purge,simplify,dce,uce,lazyexc,so2-,simplify,dce,uce,escape,inline_helpers,purge,simplify,uce,dce,dessa,statprof,peel,ssa,hvn,simplify,dce,uce,lower,dce,uce,memopt,reassoc,dce,uce,hvn,dce,uce,abcd,dce,uce,gcm,dessa,fastArrayFill,statprof,markglobals @@ -127,9 +134,6 @@ -XX:jit.SD2_OPT.arg.codegen.btr.removeConstCompare=yes -XX:jit.arg.codegen.emitter.align=4 --XX:jit.SD2_OPT.path.regalloc=webmaker,cg_regalloc,spillgen --XX:jit.SD2_OPT.arg.codegen.regalloc.webmaker.calc=true - #system properties -Djava.compiler=server Index: jitrino/src/codegenerator/ia32/Ia32RegAlloc0.cpp =================================================================== --- jitrino/src/codegenerator/ia32/Ia32RegAlloc0.cpp (revision 0) +++ jitrino/src/codegenerator/ia32/Ia32RegAlloc0.cpp (revision 0) @@ -0,0 +1,109 @@ +/* + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. + * The ASF licenses this file to You under the Apache License, Version 2.0 + * (the "License"); you may not use this file except in compliance with + * the License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +/** + * @author Intel, Sergey L. Ivashin + */ + +#include "Ia32IRManager.h" +#include "Log.h" + + +namespace Jitrino +{ + +namespace Ia32 +{ + + +//======================================================================================== +// class Ia32RegAlloc2 +//======================================================================================== + + +static const char* help = +" opnds=\n" +; + + +struct RegAlloc0Action : public Action +{ + HPipeline ra2, ra3; + + unsigned opnds; + + void init (); +}; + + +struct RegAlloc0 : public SessionAction +{ + uint32 getNeedInfo () const {return 0;} + uint32 getSideEffects () const {return 0;} + + void runImpl(); +}; + + +static ActionFactory _regalloc("regalloc", help); + + + +void RegAlloc0Action::init () +{ + ra2 = getPipeline("RA2"); + assert(ra2 != 0); + + ra3 = getPipeline("RA3"); + assert(ra3 != 0); + + getArg("opnds", opnds = 2000); +} + + +void RegAlloc0::runImpl() +{ + CompilationContext* cc = getCompilationContext(); + + RegAlloc0Action* act = (RegAlloc0Action*)getAction(); + HPipeline pipe = (getIRManager().getOpndCount() < act->opnds) ? act->ra3 : act->ra2; + for (PMF::PipelineIterator pit(pipe); pit.next();) + { + SessionAction* sa = (SessionAction*)pit.getSessionAction(); + sa->setCompilationContext(cc); + cc->setCurrentSessionAction(sa); + cc->stageId++; + + if (isLogEnabled(LogStream::CT)) + { + log(LogStream::CT) + << "RegAlloc opnds threshold:" << act->opnds + << " actual opnds:" << getIRManager().getOpndCount() + << " RA:" << sa->getTagName() + << std::endl; + } + + sa->start(); + sa->run(); + sa->stop(); + cc->setCurrentSessionAction(0); + assert(!cc->isCompilationFailed() && !cc->isCompilationFinished()); + } +} + + +} //namespace Ia32 +} //namespace Jitrino Index: jitrino/src/codegenerator/ia32/Ia32RegAlloc3.cpp =================================================================== --- jitrino/src/codegenerator/ia32/Ia32RegAlloc3.cpp (revision 541572) +++ jitrino/src/codegenerator/ia32/Ia32RegAlloc3.cpp (working copy) @@ -15,8 +15,7 @@ * limitations under the License. */ /** - * @author Sergey L. Ivashin - * @version $Revision$ + * @author Intel, Sergey L. Ivashin */ #include "Ia32IRManager.h" @@ -324,21 +323,27 @@ BoolMatrix (MemoryManager&, size_t); void clear (); - void clear (int i, int j) {at(i,j) = 0;} - void set (int i, int j) {at(i,j) = 1;} - bool test (int i, int j) const {return at(i,j) != 0;} + void clear (int i, int j) {at((unsigned)i, (unsigned)j); *ptr &= ~msk;} + void set (int i, int j) {at((unsigned)i, (unsigned)j); *ptr |= msk;} + bool test (int i, int j) {at((unsigned)i, (unsigned)j); return (*ptr & msk) != 0;} private: - char& at (int i, int j) const + void at (unsigned i, unsigned j) { - assert(0 <= i && i < (int)dim && 0 <= j && j < (int)dim && i != j); + assert((size_t)i < dim && (size_t)j < dim); - return (i < j) ? *(i*dim + j + ptr) - : *(j*dim + i + ptr); + const unsigned bitn = (i < j) ? j*(j-1)/2 + i + : i*(i-1)/2 + j; + + msk = (char)(1 << (bitn & 7)); + ptr = base + (bitn >> 3); } size_t dim, dims; + char* base; + + char msk; char* ptr; }; @@ -347,14 +352,15 @@ { assert(d > 0); dim = d; - ptr = new (mm) char[dims = dim*dim]; + dims = (dim*(dim - 1)) >> 4; // /16 + base = new (mm) char[dims]; clear(); } void RegAlloc3::BoolMatrix::clear () { - memset(ptr, 0, dims); + memset(base, 0, dims); }