Index: include/apr_thread_ext.h =================================================================== --- include/apr_thread_ext.h (revision 525148) +++ include/apr_thread_ext.h (working copy) @@ -1,10 +1,10 @@ -/* +/** * Licensed to the Apache Software Foundation (ASF) under one or more - * contributor license agreements. See the NOTICE file distributed with + * contributor license agreements. See the NOTICE file distributed with * this work for additional information regarding copyright ownership. * The ASF licenses this file to You under the Apache License, Version 2.0 * (the "License"); you may not use this file except in compliance with - * the License. You may obtain a copy of the License at + * the License. You may obtain a copy of the License at * * http://www.apache.org/licenses/LICENSE-2.0 * @@ -14,10 +14,7 @@ * See the License for the specific language governing permissions and * limitations under the License. */ -/** - * @author Andrey Chernyshev - * @version $Revision$ - */ +/** @version $Revision$ */ #ifndef APR_EXT_H Index: include/clog.h =================================================================== --- include/clog.h (revision 525148) +++ include/clog.h (working copy) @@ -1,10 +1,10 @@ -/* +/** * Licensed to the Apache Software Foundation (ASF) under one or more - * contributor license agreements. See the NOTICE file distributed with + * contributor license agreements. See the NOTICE file distributed with * this work for additional information regarding copyright ownership. * The ASF licenses this file to You under the Apache License, Version 2.0 * (the "License"); you may not use this file except in compliance with - * the License. You may obtain a copy of the License at + * the License. You may obtain a copy of the License at * * http://www.apache.org/licenses/LICENSE-2.0 * @@ -14,10 +14,9 @@ * See the License for the specific language governing permissions and * limitations under the License. */ -/** -* @author Roman S. Bushmanov -* @version $Revision: 1.1.2.1.4.3 $ -*/ +/** @version $Revision: 1.1.2.1.4.3 $*/ +/** + */ #ifndef _C_LOG_H_ #define _C_LOG_H_ Index: include/cxxlog.h =================================================================== --- include/cxxlog.h (revision 525148) +++ include/cxxlog.h (working copy) @@ -1,10 +1,10 @@ -/* +/** * Licensed to the Apache Software Foundation (ASF) under one or more - * contributor license agreements. See the NOTICE file distributed with + * contributor license agreements. See the NOTICE file distributed with * this work for additional information regarding copyright ownership. * The ASF licenses this file to You under the Apache License, Version 2.0 * (the "License"); you may not use this file except in compliance with - * the License. You may obtain a copy of the License at + * the License. You may obtain a copy of the License at * * http://www.apache.org/licenses/LICENSE-2.0 * @@ -14,10 +14,10 @@ * See the License for the specific language governing permissions and * limitations under the License. */ -/** - * @author Alexey V. Varlamov, Evgueni Brevnov - * @version $Revision: 1.1.2.2.4.4 $ - */ + +/** @version $Revision: 1.1.2.2.4.4 $*/ +/** + */ #ifndef _CXX_LOG_H_ #define _CXX_LOG_H_ @@ -29,17 +29,13 @@ namespace util { - /** - * Predefined classloader filter. - */ +/** A predefined classloader filter.*/ const char CLASS_LOGGER[] = "class"; - /** - * Predefined gc filter. - */ + +/** A predefined gc filter.*/ const char GC_LOGGER[] = "gc"; - /** - * Predefined jni filter. - */ + +/** A predefined jni filter.*/ const char JNI_LOGGER[] = "jni"; } // namespace util Index: include/lil.h =================================================================== --- include/lil.h (revision 525148) +++ include/lil.h (working copy) @@ -1,10 +1,10 @@ /* * Licensed to the Apache Software Foundation (ASF) under one or more - * contributor license agreements. See the NOTICE file distributed with + * contributor license agreements. See the NOTICE file distributed with * this work for additional information regarding copyright ownership. * The ASF licenses this file to You under the Apache License, Version 2.0 * (the "License"); you may not use this file except in compliance with - * the License. You may obtain a copy of the License at + * the License. You may obtain a copy of the License at * * http://www.apache.org/licenses/LICENSE-2.0 * @@ -14,233 +14,296 @@ * See the License for the specific language governing permissions and * limitations under the License. */ -/** - * @author Intel, Evgueni Brevnov, Ivan Volosyuk - * @version $Revision: 1.1.2.1.4.4 $ - */ +/** @version $Revision: 1.1.2.1.4.4 $*/ #ifndef _LIL_H_ #define _LIL_H_ - +/** + * @file + * LIL description. + * + * This document describes the architecture-independent language (LIL) used to + * generate code stubs etc. + * + * @sa \ref goals*/ #include #include "open/types.h" #include "vm_core_types.h" #include "tl/memory_pool.h" #include "m2n.h" -/* This file describes LIL - the architecture-independent language used to generate code stubs etc. +/** + * @page goals Goals and Design Constants of LIL + * Goals: + * + * Design constaints: + * + * The basic unit of LIL is a code stub. It is intended to be the entry point + * of a function that can be called by managed or native code, and executes in + * the presence of an activation frame. The frame consists of up to six parts: + * inputs, standard places, an m2n frame, locals, outputs, and a return variable. + * Which parts are present in the activation frame, and how big each part is, can + * vary across points in the code stub. + * + * A LIL code stub is an entry and a sequence of statements. The entry specifies + * the inputs and their types, the number of standard places, the type of the + * return, and the calling convention (which determines where the inputs, return + * address, and return goes, which registers are caller save vs callee save, and + * who pops the inputs; standard places are determined by LIL and the platform, + * and are intended for trampolines). An entry can have an "arbitrary" + * signature, meaning that the number and type of inputs and type of return is + * unknown (the stub must work for all possibilities). After entry the declared + * number of input variables are available, the declared number of standard + * places are available, there is no m2n frame, there are no locals, there are + * no outputs, and there is no return variable. + *
+ * cs ::= entry i:cc:sig; ss
+ * ss ::= s | s ss
+ * 
+ * The statements are: + *
+ * s ::= :l;
+ * |  locals i;
+ * |  std_places i;
+ * |  alloc v,i;
+ * |  v=uop o;
+ * |  v=o op o;
+ * |  v=o;
+ * |  v=ts;
+ * |  handles=o;
+ * |  ld v,addr(,zx|,sx)?;
+ * |  st addr,o;
+ * |  inc addr;
+ * |  cas addr=o,o,l;
+ * |  j l;
+ * |  jc cond,l;
+ * |  out cc:sig;
+ * |  in2out cc:RT;
+ * |  calli o;
+ * |  ret; 
+ * |  push_m2n i oh;
+ * |  m2n_save_all;
+ * |  pop_m2n;
+ * |  print str, o;
+ *
+ * uop ::= neg | not | sx1 | sx2 | sx4 | zx1 | zx2 | zx4 | ...
+ * op ::= + | - | * | & | << | ...
+ *
+ * addr ::= [ov osv i :T ackrel]
+ * ov ::= | v+
+ * osv ::= | 1*v+ | 2*v+ | 4*v+ | 8*v+
+ * acqrel ::= | ,acquire | ,release
+ *
+ * cond ::= v=0 | v!=0 | o=o | o!=o | o
+ *
+ * platform = default calling convention used by VM
+ * jni      = calling convention used by JNI
+ * managed  = calling convention used by jitted code
+ * rth      = calling convention used to call runtime helpers
+ * stdcall  = Windows's stdcall calling convention
+ *
+ * 20021204: The rth calling convention should be used for all runtime helpers.  
+ *           Unfortunately, on IA32 we are inconsistent in the calling
+ *           conventions used to call runtime helpers - some use stdcall, some 
+ *           use the managed code conventions. So for now, rth is to be
+ *           used for stdcall helpers, managed should be used for the rest.  
+ *           In the future we can harmonise this and correct the problem.
+ *
+ * l is a label (sequence of alpha, digit, _, starting with alpha or _)
+ * v is a variable, one of: i0, i1, ... (input variables), sp0, sp1, ... (standard places), 
+ * l0, l1, ... (local variables),
+ * o0, o1, ... (output variables), r (return variable)
+ * i is an immediate (sequence of digits, or 0x hex digits)
+ * str is either a string enclosed in single quotes, or a number denoting an address
+ *
+ * Operand semantics:
+ *
+ * An operand with a v stands for that variable; an operand with an i stands for 
+ * that immediate; an operand with an optional :t is cast to the
+ * type t (ie it has type t). Only certain casts are allowed by the verifier: 
+ * the types ref, pint, and g4/g8 (depending upon architecture) are
+ * castable to each other. Note that casting refs to/from the other types may be 
+ * GC unsafe.
+ *
+ * Statement semantics:
+ *
+ * :l declares a label l. A LIL code stub is not valid if such a label merges 
+ * control flow with inconsistent activation frames. Specifically, the number 
+ * and types of inputs must be the same (currently there is no way they
+ * could not be), only the minimum of the number of standard places will be 
+ * available after the statement, the m2n frame must either be present in 
+ * all incoming edges or absent in all incoming edges, the number of locals 
+ * must be the same, the number of outputs must be the same, and
+ * the return variable will be defined after the statement only if it is 
+ * defined on all incoming edges.
+ *
+ * locals i makes i locals available in the activation frame.  
+ * If there were locals available previously, they are lost.
+ * std_places i makes i standard places available in the activation frame.  
+ * If there were standard places available previously,
+ * they are lost.
+ *
+ * alloc v, i allocates i contigous bytes of space whose lifetime is up to the 
+ * next ret, tailcall, or pop_m2n instruction.
+ * The address of this space is placed into v. The space will not be moved for 
+ * any reason. The amount of space allocated by such instructions must
+ * be statically determinable for each code point in a code stub. This instruction 
+ * may not appear between out/in2out and call/call.noret/tailcall instructions.
+ *
+ * v=uop o evaluates o to a value, performs unary operation uop on it, and stores 
+ * the result in v. 
+ *
+ * v=o1 op o2 evaluates o1 & o2 to values, performs binary operation op on them, 
+ * and stores the result in v.
+ *
+ * v=ts places a pointer to the current thread's thread structure into v.
+ *
+ * handles=o evaluates o to a value and sets the handles pointer in the m2n frame 
+ * to this value. This instruction must be dominated by a push_m2n handles 
+ * instruction.
+ *
+ * ld v,addr evaluates addr to an address (see below) and loads the value 
+ * (of type given in addr) at this address into v. If ,zx appears at the end then the 
+ * value is zero extended into v, which gets type pint; if ,sx appears at the end then 
+ * the value is sign extended into v, which gets pint; otherwise, v gets the same type as 
+ * in addr.
+ *
+ * st addr,o evaluates addr to an address (see below) o to a value and stores the 
+ * value into the contents (of type given in addr) at the address.
+ *
+ * inc addr evaluates addr to an address (ses below) and increments the value 
+ * (of type given in addr) at this address.
+ *
+ * cas addr=o1,o2,l evaluates addr to an address (see below) a, o1 to a value v1, and 
+ * o2 to a value v2. Then it atomically: compares the value (of type gien in addr) 
+ * to o1 and if equal swaps the contents of a with o2. If the match fails then it 
+ * jumps to label l.
+ *
+ * ov+osv+i:T acqrel evaluates to (0 | contents of v) + (0 | 1 * contents of v
+ * | 2 * contents of v | 4 * contents of v | * 8 * contents of v) + i. 
+ * Further if acqrel is acquire then the operation in which it appears has 
+ * acquire semantics, and if it is release then the operation in which it 
+ * appears has release semantics.
+ *
+ * j l jumps to label l. A LIL code stub is invalid if l is not a declared label 
+ * in the code stub.
+ * jc cond, l either continues with the next statement or jumps to label l, 
+ * depending upon the evaluation of cond. A LIL code stub is invalid if l 
+ * is not declared in the stub. The conditions are evaluated as follows.  
+ * v=0 will branch if v has value 0; v!=0 will branch if v does not have value 0; 
+ * o1=o2 will branch if o1 & o2 evaluate to the same value; o1!=o2
+ * will branch if o1 & o2 evaluate to different values; o1
+ * T ::= g1 | g2 | g4 | g8 | f4 | f8 | ref | pint
+ * RT ::= T | void
+ *
+ * sig ::= Ts:RT | arbitrary
+ * Ts ::= | T,Ts
+ * 
+ * + * The meaning of the types is: g1 means a one-byte general-purpose (ie not + * floating point) quantitiy, g2 means two-byte, g4 means 4-bytes, g8 menas + * eight-byte, f4 means a 4-byte floating-point quantity, f8 means 8-byte, + * ref means a pointer into the managed heap, pint means a platform-sized + * general-purpose quantity which might be an integer or an unmanaged pointer, + * void means there is nothing returned. + * + * The LIL syntax allows comments that start with // and go to the end of the line. + */ -Goals: -* Lightweight - i.e. small language, quality code generation possible with small simple algorithms -* Remove most architecture dependencies from code -* (Future) allow inlining of VM stubs into JITed code -* (Future) allow inlining of GC or Thread/Sync code via LIL -* (Possibly future) be the lowest ir of a simple JIT - -Design constaints: -* Keep language syntax LL(1) so that parsing can be done with a recursive descent parser -* Make single-pass register allocation possible -* Allow easy experimentation with calling conventions - -The basic unit of LIL is a code stub. It is intended to be the entry point of a function that can be -called by managed or native code, and executes in the presence of an activation frame. The frame consists -of up to six parts: inputs, standard places, an m2n frame, locals, outputs, and a return variable. Which -parts are present in the activation frame, and how big each part is, can vary across points in the code stub. - -A LIL code stub is an entry and a sequence of statements. The entry specifies the inputs and their types, the -number of standard places, the type of the return, and the calling convention (which determines where the inputs, -return address, and return goes, which registers are caller save vs callee save, and who pops the inputs; standard -places are determined by LIL and the platform, and are intended for trampolines). An entry can have an "arbitrary" -signature, meaning that the number and type of inputs and type of return is unknown (the stub must work for all -possibilities). After entry the declared number -of input variables are available, the declared number of standard places are available, there is no m2n frame, -there are no locals, there are no outputs, and there is no return variable. - -cs ::= entry i:cc:sig; ss -ss ::= s | s ss - -The statements are: - -s ::= :l; -| locals i; -| std_places i; -| alloc v,i; -| v=uop o; -| v=o op o; -| v=o; -| v=ts; -| handles=o; -| ld v,addr(,zx|,sx)?; -| st addr,o; -| inc addr; -| cas addr=o,o,l; -| j l; -| jc cond,l; -| out cc:sig; -| in2out cc:RT; -| calli o; -| ret; -| push_m2n i oh; -| m2n_save_all; -| pop_m2n; -| print str, o; - -uop ::= neg | not | sx1 | sx2 | sx4 | zx1 | zx2 | zx4 | ... -op ::= + | - | * | & | << | ... - -addr ::= [ov osv i :T ackrel] -ov ::= | v+ -osv ::= | 1*v+ | 2*v+ | 4*v+ | 8*v+ -acqrel ::= | ,acquire | ,release - -cond ::= v=0 | v!=0 | o=o | o!=o | o + *
  • i in an immediate, takes the next argument as a pointer-size + * int (int on IA32, long long on IPF) as the value of the immediate
  • + *
  • i in a variable, takes the next argument as a platform int + * as the index (not valid for ret)
  • + *
  • m in a signature, takes the next argument as a + * Method_Handle and constructs the standard managed signature + * for it
  • + *
  • j in a signature, takes the next argument as a + * Method_Handle and constructs the standard JNI signature for it
  • + * + * + * % may also be used in a label to get generated labels, there are + * no numbers, but the specifiers are: + * + * + * @return NULL on parsing error.*/ LilCodeStub* lil_parse_code_stub(const char* src, ...); -// Parse a string as a sequence of instructions and add them to the end of the input code stub. -// The % syntax above can be used. -// Return NULL on parsing error and the input is freed, otherwise the return is the same as the parameter. -LilCodeStub* lil_parse_onto_end(LilCodeStub*, const char* src, ...); -//*** Instruction Contexts +/** + * Parse a string as a sequence of instructions and add them to the end of the + * input code stub. + * The % syntax above can be used. + * + * @return NULL on parsing error and the input is freed, otherwise + * the return is the same as the parameter.*/ + LilCodeStub* lil_parse_onto_end(LilCodeStub*, const char* src, ...); +/** @}*/ + +/** + * @name Instruction Contexts + * @{*/ enum LilM2nState { LMS_NoM2n, LMS_NoHandles, LMS_Handles }; struct LilInstructionContext; @@ -318,173 +407,228 @@ VMEXPORT unsigned lil_ic_get_amt_alloced(LilInstructionContext*); VMEXPORT LilType lil_ic_get_type(LilCodeStub*, LilInstructionContext*, LilOperand*); - -// returns the type of an instruction's destination variable _after_ the -// instruction is performed. -// If the instruction has no destination, LT_Void is returned. -// Notice that this type may be different than the type returned by -// lil_ic_get_type for the destination variable, since the latter -// refers to the situation _before_ the instruction. +/** + * Returns the type of an instruction's destination variable _after_ + * the instruction is performed. + * If the instruction has no destination, LT_Void is returned. + * Notice that this type may be different than the type returned by + * lil_ic_get_type for the destination variable, since the latter + * refers to the situation _before_ the instruction.*/ VMEXPORT LilType lil_instruction_get_dest_type(LilCodeStub*, LilInstruction*, LilInstructionContext*); +/** @}*/ -//*** Interogators - -// Is a LIL code stub valid? +/** + * @name Interogators + * @{*/ +/** Is a LIL code stub valid?*/ VMEXPORT bool lil_is_valid(LilCodeStub* cs); -// Return a code stubs entry signature +/** Returns a code stubs entry signature.*/ VMEXPORT LilSig* lil_cs_get_sig(LilCodeStub* cs); -// Return the number of instructions in a code stub -VMEXPORT unsigned lil_cs_get_num_instructions(LilCodeStub* cs); +/** Returns the number of instructions in a code stub.*/ + VMEXPORT unsigned lil_cs_get_num_instructions(LilCodeStub* cs); -// Return the number of BBs in a code stub -VMEXPORT unsigned lil_cs_get_num_BBs(LilCodeStub *cs); +/** Returns the number of BBs in a code stub.*/ + VMEXPORT unsigned lil_cs_get_num_BBs(LilCodeStub *cs); -// Return the first BB in the stub (from that one can get all BBs using get_next() -VMEXPORT LilBb* lil_cs_get_entry_BB(LilCodeStub* cs); +/** + * Returns the first BB in the stub (from that one can get all + * BBs using get_next(). + */ + VMEXPORT LilBb* lil_cs_get_entry_BB(LilCodeStub* cs); -// Compute the contexts of each instruction in the code stub -// This function must be called to use instruction iterators that track contexts -VMEXPORT void lil_compute_contexts(LilCodeStub* cs); +/** + * Computes the contexts of each instruction in the code stub. + * This function must be called to use instruction iterators that track contexts. + */ + VMEXPORT void lil_compute_contexts(LilCodeStub* cs); -// Return maximum number of std places used in the stub -VMEXPORT unsigned lil_cs_get_max_std_places(LilCodeStub * cs); +/** Returns maximum number of std places used in the stub.*/ + VMEXPORT unsigned lil_cs_get_max_std_places(LilCodeStub * cs); -// Return maximum number of locals used in the stub -VMEXPORT unsigned lil_cs_get_max_locals(LilCodeStub * cs); +/** Returns maximum number of locals used in the stub.*/ + VMEXPORT unsigned lil_cs_get_max_locals(LilCodeStub * cs); -// Return size of generated code -VMEXPORT void lil_cs_set_code_size(LilCodeStub * cs, size_t size); +/** Returns size of generated code.*/ + VMEXPORT void lil_cs_set_code_size(LilCodeStub * cs, size_t size); -// Return size of generated code +/** Returns size of generated code.*/ VMEXPORT size_t lil_cs_get_code_size(LilCodeStub * cs); -// totally artificial limit; increase if needed -// the max number of predecessors any BB may have -#define MAX_BB_PRED 10 +/** + * Totally artificial limit; increase if needed the max number of predecessors + * any BB may have. + */ + #define MAX_BB_PRED 10 - class LilBb { private: - // the code stub + +/** @}*/ + +/** + * @name The Code Stub + * @{*/ LilCodeStub *cs; - - // since bb code will appear consecutively in the stub, - // all we need is the first and last instruction +/** + * Since BB code will appear consecutively in the stub, all we + * need is the first and last instruction. + */ LilInstruction *start; LilInstruction *end; // if end is NULL, the end of the stub is implied - // the LIL context right before the first instruction of the BB - LilInstructionContext* ctxt; +/** The LIL context right before the first instruction of the BB.*/ + LilInstructionContext* ctxt; - // successors of this BB in the flowgraph - LilBb* fallthru; - LilBb* branch_target; +/** Successors of this BB in the flowgraph.*/ + LilBb* fallthru; + LilBb* branch_target; - // predecessors of this BB in the flowgraph - unsigned num_pred; - LilBb *pred[MAX_BB_PRED]; - // for forming BB lists - LilBb* next; - // ID; within each stub, IDs will be unique and go from 0 to -1 - int id; - // private constructor; create BBs by calling init_fg() - LilBb(LilCodeStub *_cs, LilInstruction *_start, - LilInstructionContext* ctxt_at_start); +/** + * Predecessors of this BB in the flowgraph unsigned + * num_pred;*/ + LilBB *pred[MAX_BB_PRED]; - // private operator new; create BBs using new_bb() only +/** For forming BB lists.*/ + LilBb* next; + +/** + * ID; within each stub, IDs will be unique and go from 0 to + * -1. + */ + int id; + +/** Private constructor; create BBs by calling init_fg().*/ + LilBb(LilCodeStub *_cs, LilInstruction *_start, + LilInstructionContext* ctxt_at_start); + +/** + * Private operator new; create BBs using new_bb() + * only.*/ void* operator new(size_t sz, tl::MemoryPool& m); - //MVM - //add empty destructor to avoid warning - void operator delete(void * UNREF obj, tl::MemoryPool& UNREF m){ - //do nothing + +/** MVM add empty destructor to avoid warning.*/ + void operator delete(void * UNREF obj, tl::MemoryPool& UNREF m){ + +/** Do nothing.*/ }; public: - // the only way to create new BBs; create a whole FG for a stub - VMEXPORT static void init_fg(LilCodeStub*); +/** The only way to create new BBs; create a whole FG for a stub.*/ + VMEXPORT static void init_fg(LilCodeStub*); - // sets the last instruction of the BB - VMEXPORT void set_last(LilInstruction *i); +/** Sets the last instruction of the BB.*/ + VMEXPORT void set_last(LilInstruction *i); - // gets the first instruction - VMEXPORT LilInstruction* get_first(); - // gets the last instruction - VMEXPORT LilInstruction* get_last(); +/** Gets the first instruction.*/ + VMEXPORT LilInstruction* get_first(); - // get the context right before the start of the BB - VMEXPORT LilInstructionContext* get_context(); +/** Gets the last instruction.*/ + VMEXPORT LilInstruction* get_last(); - // does this bb contain instruction i? - VMEXPORT bool contains(LilInstruction *i); +/** Get the context right before the start of the BB.*/ + VMEXPORT LilInstructionContext* get_context(); - // get the label of this BB; NULL if no label exists +/** Does this BB contain instruction i?*/ + VMEXPORT bool contains(LilInstruction *i); + +/** Get the label of this BB; NULL if no label exists.*/ VMEXPORT LilLabel get_label(); - // set a fallthrough successor to this bb - VMEXPORT void set_fallthru(LilBb *); - // set a branch-target successor to this bb - VMEXPORT void set_branch_target(LilBb *); +/** Set a fallthrough successor to this BB.*/ + VMEXPORT void set_fallthru(LilBb *); - // get the fallthrough and branch target successors; - // either of them can be NULL if they don't exist +/** Set a branch-target successor to this BB.*/ + VMEXPORT void set_branch_target(LilBb *); + +/** Get the fallthrough and branch target successors; either of them can be + * NULL if they don't exist.*/ VMEXPORT LilBb* get_fallthru(); VMEXPORT LilBb* get_branch_target(); - // gets the i'th predecessor (NULL if i >= num_pred) - VMEXPORT LilBb *get_pred(unsigned i); +/** Gets the i'th predecessor (NULL if i >= num_pred).*/ + VMEXPORT LilBb *get_pred(unsigned i); - // gets the next BB in the list - VMEXPORT LilBb *get_next(); + /** Gets the next BB in the list.*/ + VMEXPORT LilBb *get_next(); - // returns whether this BB ends in a return instruction - // (tailcall implies return!) +/** + * Returns whether this BB ends in a return instruction (tailcall + * implies return!). + */ VMEXPORT bool is_ret(); - // the id of this BB - VMEXPORT int get_id(); +/** The id of this BB.*/ + VMEXPORT int get_id(); - // true if this BB contains calls (which means it may throw exceptions) +/** + * TRUE if this BB contains calls (which means it may + * throw exceptions). + */ VMEXPORT bool does_calls(); - // true if this BB ends with a call.noret (which means it is probably cold code) +/** + * TRUE if this BB ends with a call.noret (which means + * it is probably cold code). + */ VMEXPORT bool does_call_noret(); - // find a BB with the specified label; NULL if no such bb exists +/** + * Find a BB with the specified label; NULL if no + * such BB exists. + */ VMEXPORT static LilBb* get_by_label(LilCodeStub *cs, LilLabel l); - // find a BB which contains the specified instruction; NULL if no such BB exists +/** + * Find a BB which contains the specified instruction; + * NULL if no such BB exists. + */ VMEXPORT static LilBb* get_by_instruction(LilCodeStub *cs, LilInstruction *i); - // print a BB to a stream (does not print the BB's instructions) +/** + * Print a BB to a stream (does not print the BB's + * instructions). + */ VMEXPORT void print(FILE* out); }; - - -// Iterate over the instructions in a code stub +/** Iterate over the instructions in a code stub.*/ class LilInstructionIterator { public: - // Create an iterator from a code stub, if track_contexts then track the context prior to each instruction + +/** + * Create an iterator from a code stub, if track_contexts then + * track the context prior to each instruction. + */ VMEXPORT LilInstructionIterator(LilCodeStub*, bool track_contexts); - // Create an iterator for a BB in a code stub. - // NOTE: track_contexts is currently NOT supported for this type of iterator +/** + * Create an iterator for a BB in a code stub. + * + * @note track_contexts is currently NOT supported for this + * type of iterator. + */ VMEXPORT LilInstructionIterator(LilCodeStub*, LilBb*, bool track_contexts); - // Is iterator past the end of the instructions? - VMEXPORT bool at_end(); - // Return current instruction - VMEXPORT LilInstruction* get_current(); - // Return context prior to current instruction, must have created iterator to track contexts +/** Is iterator past the end of the instructions?*/ + VMEXPORT bool at_end(); + +/** Return current instruction.*/ + VMEXPORT LilInstruction* get_current(); + +/** + * Return context prior to current instruction, must have created iterator + * to track contexts. + */ VMEXPORT LilInstructionContext* get_context(); - // Goto the next instruction - VMEXPORT void goto_next(); +/** Goto the next instruction.*/ + VMEXPORT void goto_next(); + private: LilCodeStub* cs; LilBb *bb; // NULL, unless this is an iterator for a BB @@ -493,9 +637,11 @@ LilInstructionContext* ctxt; }; +/** @}*/ +/** @name Visitor pattern for instructions + * @{*/ -// Visitor pattern for instructions class LilInstructionVisitor { protected: VMEXPORT LilInstructionVisitor(); @@ -525,10 +671,11 @@ virtual void print(char *, LilOperand *) = 0; }; - -// LilInstructionVisitor_Default provides empty implementations for the -// abstract functions in LilInstructionVisitor. It is a convenient base -// class for scanners that need to act only on a few instructions. +/** + * LilInstructionVisitor_Default provides empty implementations for the + * abstract functions in LilInstructionVisitor. It is a convenient base + * class for scanners that need to act only on a few instructions. + */ class LilInstructionVisitor_Default : public LilInstructionVisitor { protected: LilInstructionVisitor_Default(): @@ -560,63 +707,86 @@ }; -// Visit instruction using a visitor +/** Visit instruction using a visitor.*/ VMEXPORT void lil_visit_instruction(LilInstruction*, LilInstructionVisitor*); +/** Return variable's kind.*/ +VMEXPORT LilVariableKind lil_variable_get_kind(LilVariable* v); -// Return variable's kind -VMEXPORT LilVariableKind lil_variable_get_kind(LilVariable* v); -// Return variable's index +/** Return variable's index.*/ VMEXPORT unsigned lil_variable_get_index(LilVariable* v); -// Are two variables the same + +/** Are two variables the same*/ VMEXPORT bool lil_variable_is_equal(LilVariable* v1, LilVariable* v2); -// Is operand an immediate? +/** Is operand an immediate?*/ VMEXPORT bool lil_operand_is_immed(LilOperand* o); -// If operand is an immediate return the immediate value + +/** If operand is an immediate return the immediate value.*/ VMEXPORT POINTER_SIZE_INT lil_operand_get_immed(LilOperand* o); -// If operand is not an immediate return the variable it represents + +/** If operand is not an immediate return the variable it represents.*/ VMEXPORT LilVariable* lil_operand_get_variable(LilOperand* o); -// Return a signature's calling convention +/** Return a signature's calling convention.*/ VMEXPORT LilCc lil_sig_get_cc(LilSig* sig); -// Return whether this signature is arbitrary + +/** Return whether this signature is arbitrary.*/ VMEXPORT bool lil_sig_is_arbitrary(LilSig *sig); -// Return the number of arguments for a signature (0 if arbitrary) + +/** Return the number of arguments for a signature (0 if arbitrary).*/ VMEXPORT unsigned lil_sig_get_num_args(LilSig* sig); -// Return the num-th argument type of a signature (zero based) (undefined if signature is arbitrary) + +/** + * Return the num-th argument type of a signature (zero based) (undefined if + * signature is arbitrary). + */ VMEXPORT LilType lil_sig_get_arg_type(LilSig* sig, unsigned num); -// Return the return type of a signature + +/** + * Return the return type of a signature. + */ VMEXPORT LilType lil_sig_get_ret_type(LilSig* sig); -// Is an operation binary? +/** Is an operation binary?*/ VMEXPORT bool lil_operation_is_binary(enum LilOperation op); -// Is a predicate binary? +/** Is a predicate binary?*/ VMEXPORT bool lil_predicate_is_binary(enum LilPredicate c); -// Is a predicate signed? +/** Is a predicate signed?*/ VMEXPORT bool lil_predicate_is_signed(LilPredicate c); -//*** Printers +/**@}*/ -// Print a type to a stream +/** @name Printers*/ +/** @{*/ +/** Print a type to a stream.*/ VMEXPORT void lil_print_type(FILE*, LilType); -// Print a signature to a stream + +/** Print a signature to a stream.*/ VMEXPORT void lil_print_sig(FILE*, LilSig*); -// Print an instruction to a stream + +/** Print an instruction to a stream.*/ VMEXPORT void lil_print_instruction(FILE*, LilInstruction* i); -// Print a code stub to a stream + +/** Print a code stub to a stream.*/ VMEXPORT void lil_print_code_stub(FILE*, LilCodeStub* cs); -// Print just the entry of a code stub to a stream + +/** Print just the entry of a code stub to a stream.*/ VMEXPORT void lil_print_entry(FILE*, LilCodeStub* cs); -//*** Freers +/** @}*/ -// Return all resources associated with a code stub -// Post: code stub no longer usable +/** @name Freers */ +/** @{*/ +/** + * Returns all resources associated with a code stub Post: code stub no longer + * usable.*/ VMEXPORT void lil_free_code_stub(LilCodeStub* cs); -//*** Function pointer utilities +/** @}*/ +/** @name Function pointer utilities*/ +/** @{*/ VMEXPORT GenericFunctionPointer lil_npc_to_fp(NativeCodePtr); - +/** @}*/ #endif // _LIL_H_ Index: include/lil_code_generator.h =================================================================== --- include/lil_code_generator.h (revision 525148) +++ include/lil_code_generator.h (working copy) @@ -1,10 +1,10 @@ -/* +/** * Licensed to the Apache Software Foundation (ASF) under one or more - * contributor license agreements. See the NOTICE file distributed with + * contributor license agreements. See the NOTICE file distributed with * this work for additional information regarding copyright ownership. * The ASF licenses this file to You under the Apache License, Version 2.0 * (the "License"); you may not use this file except in compliance with - * the License. You may obtain a copy of the License at + * the License. You may obtain a copy of the License at * * http://www.apache.org/licenses/LICENSE-2.0 * @@ -14,56 +14,62 @@ * See the License for the specific language governing permissions and * limitations under the License. */ -/** - * @author Intel, Evgueni Brevnov, Ivan Volosyuk - * @version $Revision: 1.1.2.1.4.4 $ - */ +/** @version $Revision: 1.1.2.1.4.4 $*/ #ifndef _LIL_CODE_GENERATOR_H_ #define _LIL_CODE_GENERATOR_H_ - +/** + * @file + * The abstract base case for LIL code generators description. + * + * Subclasses compile LIL into native code for a particular + * architecture. + * + * @note This is a compiler algorithm abstraction not a compilation process + * abstraction. Subclasses should not store state about any particular + * compilation, only options that configure the compilation. + */ #include "lil.h" #include "vm_core_types.h" #include "environment.h" #include "mem_alloc.h" -// This is an abstract base case for LIL code generators -// Subclasses compile LIL into native code for a particular -// architecture - -// Note that this is a compiler algorithm abstraction not -// a compilation process abstraction. Subclasses should -// not store state about any particular compilation, only -// options that configure the compilation. - class LilCodeGenerator { public: - // Return the code generator for the current platform - static LilCodeGenerator* get_platform(); - // Compile LIL code stub to native code and return it - // The stub_name is for vtune support - // Dump an ascii version of the compiled stub to stdout if dump_stub - // If cs_stats is nonnull add the number of bytes of the compiled code to *cs_stats +/** + * Returns the code generator for the current platform static + * LilCodeGenerator* get_platform(); + * + * Compile LIL code stub to native code and return it. + * The stub_name is for vtune support. + * Dump an ascii version of the compiled stub to stdout if dump_stub. + * If cs_stats is nonnull add the number of bytes of the compiled + * code to *cs_stats. + */ NativeCodePtr compile(LilCodeStub* cs, PoolManager* code_pool = VM_Global_State::loader_env->GlobalCodeMemoryManager); protected: LilCodeGenerator(); - // allocates a chunk of memory for a LIL stub; the user-provided function - // compile_main() should call this function instead of allocating memory - // directly. +/** + * Allocates a chunk of memory for a LIL stub; the user-provided function + * compile_main() should call this function instead of allocating + * memory directly. + */ NativeCodePtr allocate_memory(size_t, PoolManager*); - // generates compiled code for a LIL stub, and returns its address. The - // size of the compiled stub is placed in stub_size. Called by the - // compile() function to do most of the work. - // - // Each subclass of LilCodeGenerator should provide a platform-dependent - // implementation of compile_main(). The memory area that holds the - // compiled code should be allocated by calling allocate_memory(). +/** + * Generates compiled code for a LIL stub, and returns its address. The size + * of the compiled stub is placed in stub_size. Called by the + * compile() function to do most of the work. + * + * Each subclass of LilCodeGenerator should provide a platform-dependent + * implementation of compile_main(). The memory area that holds the + * compiled code should be allocated by calling allocate_memory(). + */ virtual NativeCodePtr compile_main(LilCodeStub* cs, size_t* stub_size, PoolManager* code_pool) = 0; }; Index: include/lil_code_generator_utils.h =================================================================== --- include/lil_code_generator_utils.h (revision 525148) +++ include/lil_code_generator_utils.h (working copy) @@ -1,10 +1,10 @@ -/* +/** * Licensed to the Apache Software Foundation (ASF) under one or more - * contributor license agreements. See the NOTICE file distributed with + * contributor license agreements. See the NOTICE file distributed with * this work for additional information regarding copyright ownership. * The ASF licenses this file to You under the Apache License, Version 2.0 * (the "License"); you may not use this file except in compliance with - * the License. You may obtain a copy of the License at + * the License. You may obtain a copy of the License at * * http://www.apache.org/licenses/LICENSE-2.0 * @@ -14,24 +14,25 @@ * See the License for the specific language governing permissions and * limitations under the License. */ -/** - * @author Intel, Evgueni Brevnov, Ivan Volosyuk - * @version $Revision: 1.1.2.1.4.4 $ - */ +/** @version $Revision: 1.1.2.1.4.4 $*/ + #ifndef _LIL_CODE_GENERATOR_UTILS_H_ #define _LIL_CODE_GENERATOR_UTILS_H_ #include "lil.h" #include "vm_core_types.h" -// This module provides some common utilities for generating native code from LIL code stubs - -//*** The following is for managing label to address translation and back patching - -// Patch types have to be the union of the various cases of the various architectures, -// so unfortunately are somewhat platform specific. +/** + * This module provides some common utilities for generating native code from + * LIL code stubs. + * + * The following is for managing label to address translation and back patching. + * + * Patch types have to be the union of the various cases of the various + * architectures, so unfortunately are somewhat platform specific. + */ typedef enum LilCguPatchType { LPT_Rel8, LPT_Rel32, LPT_Abs32 } LilCguPatchType; @@ -50,28 +51,38 @@ LilCguLabelAddress * next; }LilCguLabelAddress; - -// This class mantains a mapping between labels and addresses, and ensures the references to -// labels eventually point to those labels. -// Clients should call define_label to set a label's address, and patch_to_label to ensure references -// correct point to a label; the class will make sure that a reference points to its label once both -// functions have been called. +/** + * This class mantains a mapping between labels and addresses, and ensures the + * references to labels eventually point to those labels. + * Clients should call define_label to set a label's address, and + * patch_to_label to ensure references correct point to a label; + * the class will make sure that a reference points to its label once both + * functions have been called. + */ class LilCguLabelAddresses { public: - // Create a label to address mapping with back patching + +/** Create a label to address mapping with back patching.*/ LilCguLabelAddresses(tl::MemoryPool*, char * b); - // + void change_base(char * new_base); - // Label l should have addres code + +/** Label l should have addres code.*/ void define_label(LilLabel l, void * code, bool base_relative); - // The contents of address patch_address should point to label l according to patch_type + +/** + * The contents of address patch_address should point to label l + * according to patch_type. + */ void add_patch_to_label(LilLabel l, void * patch_address, LilCguPatchType patch_type); private: void add_new_label_adress(LilLabel l, void * code, bool base_relative); - // Apply all patches associated with the current label + +/** Apply all patches associated with the current label.*/ void apply_patches(LilCguLabelAddress * label_adress); - // Actually apply a patch + +/** Actually apply a patch.*/ void apply_patch(LilCguLabelAddress * label_adress, LilCguPatch * patch); LilCguLabelAddress * first; Index: include/log_macro.h =================================================================== --- include/log_macro.h (revision 525148) +++ include/log_macro.h (working copy) @@ -1,10 +1,10 @@ -/* +/** * Licensed to the Apache Software Foundation (ASF) under one or more - * contributor license agreements. See the NOTICE file distributed with + * contributor license agreements. See the NOTICE file distributed with * this work for additional information regarding copyright ownership. * The ASF licenses this file to You under the Apache License, Version 2.0 * (the "License"); you may not use this file except in compliance with - * the License. You may obtain a copy of the License at + * the License. You may obtain a copy of the License at * * http://www.apache.org/licenses/LICENSE-2.0 * @@ -14,49 +14,41 @@ * See the License for the specific language governing permissions and * limitations under the License. */ -/** - * @author Alexey V. Varlamov, Evgueni Brevnov - * @version $Revision: 1.1.2.1.4.4 $ - */ + +/** @version $Revision: 1.1.2.1.4.4 $*/ + #ifndef _UTIL_LOG_MACRO_H #define _UTIL_LOG_MACRO_H #include #include - /** * @file - * - * Basic logging is used during startup. + * Basic logging used during startup. */ - /** - * Macro expansion. It is used, for example, to combine - * a filename and a line number in - * __FILELINE__ macro. + * Macro expansion. It is used, for example, to combine a filename and a line + * number in __FILELINE__ macro. */ #define EXPAND_(a) # a #define EXPAND(a) EXPAND_(a) -/** - * Concatenate the file name and the line number. - */ +/** Concatenate the file name and the line number.*/ #define LOG_FILELINE __FILE__ ":" EXPAND(__LINE__) -/** - * Create a log message header. - */ +/** Create a log message header.*/ #define LOG_HEAD ":" LOG_FILELINE ": " /** * @def ABORT(message) + * * @brief Lightweight implementation for error handling. * - * It prints a simple string message to stderr - * and exits the program. This macro call should be - * used when logging subsystem is not yet fully initialized. + * It prints a simple string message to stderr and exits the program. This + * macro call should be used when logging subsystem is not yet fully + * initialized. */ #define ABORT(message) { \ fprintf(stderr, "Internal error" LOG_HEAD message); \ @@ -64,10 +56,7 @@ abort(); \ } -/** - * Lightweight macro to replace a standard C - * assert(). - */ +/** Lightweight macro to replace a standard C assert().*/ #ifdef NDEBUG # define LOG_ASSERT(assertion, message) /* Asserts are disabled, \ * reset NDEBUG macro to turn them on. */ Index: include/logger.h =================================================================== --- include/logger.h (revision 525148) +++ include/logger.h (working copy) @@ -1,10 +1,10 @@ -/* +/** * Licensed to the Apache Software Foundation (ASF) under one or more - * contributor license agreements. See the NOTICE file distributed with + * contributor license agreements. See the NOTICE file distributed with * this work for additional information regarding copyright ownership. * The ASF licenses this file to You under the Apache License, Version 2.0 * (the "License"); you may not use this file except in compliance with - * the License. You may obtain a copy of the License at + * the License. You may obtain a copy of the License at * * http://www.apache.org/licenses/LICENSE-2.0 * @@ -14,14 +14,12 @@ * See the License for the specific language governing permissions and * limitations under the License. */ -/** -* @author Roman S. Bushmanov, Dmitry B. Yershov -* @version $Revision: 1.1.2.2.4.3 $ -*/ +/** @version $Revision: 1.1.2.2.4.3 $*/ + #ifndef LOGGER_H #define LOGGER_H - +/** */ #define LOG4CXX #define LOG4CXX_STATIC @@ -31,9 +29,7 @@ extern "C" { #endif -/** - * Enum of logging levels - */ +/** Enum of logging levels.*/ typedef enum { DIE = 0, WARN, @@ -42,9 +38,7 @@ TRACE } LoggingLevel; -/** - * Header format flags. Binary AND operation should be used to combine flags. - */ +/** Header format flags. Binary AND operation should be used to combine flags.*/ typedef unsigned HeaderFormat; #define HEADER_EMPTY 0 #define HEADER_TIMESTAMP 1 @@ -64,38 +58,30 @@ # endif #endif - -/** -* Inits log system. -*/ +/** Inits log system.*/ VMEXPORT void init_log_system(void *portLib); -/** -* shutdown log system. -*/ +/** Shutdown log system.*/ VMEXPORT void shutdown_log_system(); -/** -* Sets loggers logging levels from file -*/ +/** Sets loggers logging levels from file.*/ VMEXPORT void set_logging_level_from_file(const char* filename); /** - * Passes the message specified with level assigned to the category specified for logging. + * Passes the message specified with level assigned to the category specified + * for logging. */ VMEXPORT void log4cxx_from_c(const char *category, LoggingLevel level, const char* message, const char* file, const char* func, int line); /** - * Assigns threshold to a category. All the messages having a lower logging level will - * be ignored by the category. + * Assigns threshold to a category. All the messages having a lower logging + * level will be ignored by the category. */ VMEXPORT void set_threshold(const char *category, LoggingLevel level); -/** - * Checks if the logging level specified is enabled for the category given. - */ +/** Checks if the logging level specified is enabled for the category given.*/ VMEXPORT unsigned is_enabled(const char *category, LoggingLevel level); VMEXPORT unsigned is_warn_enabled(const char *category); @@ -118,27 +104,31 @@ VMEXPORT unsigned is_trace_enabled(const char *category, LogSite *site); /** -* Redirects category (and all subcategories) output to a file. -* If the file is NULL, removes previously assigned redirection (if any). -*/ + * Redirects category (and all subcategories) output to a file. + * + * If the file is NULL, removes previously assigned redirection + * (if any). + */ VMEXPORT void set_out(const char *category, const char* file); /** - * Sets the header format for the category specified. Use HeaderFormat - * flags combined by AND operation to configure format. + * Sets the header format for the category specified. Use + * HeaderFormat flags combined by AND operation to configure + * format. */ VMEXPORT void set_header_format(const char *category, HeaderFormat format); /** * Sets the log file path pattern to use for thread specific logging. + * * Specify NULL pattern to turn off per-thread output. * Use %t specifier to be replaced by a thread id. */ VMEXPORT void set_thread_specific_out(const char* category, const char* pattern); /** - * Write formatted data to a newly allocated string. - * Use STD_FREE to release allocated memory. + * Write formatted data to a newly allocated string. + * Use STD_FREE to release allocated memory. */ VMEXPORT const char* log_printf(const char* format, ...); Index: include/loggerstring.h =================================================================== --- include/loggerstring.h (revision 525148) +++ include/loggerstring.h (working copy) @@ -1,10 +1,10 @@ -/* +/** * Licensed to the Apache Software Foundation (ASF) under one or more - * contributor license agreements. See the NOTICE file distributed with + * contributor license agreements. See the NOTICE file distributed with * this work for additional information regarding copyright ownership. * The ASF licenses this file to You under the Apache License, Version 2.0 * (the "License"); you may not use this file except in compliance with - * the License. You may obtain a copy of the License at + * the License. You may obtain a copy of the License at * * http://www.apache.org/licenses/LICENSE-2.0 * @@ -14,11 +14,9 @@ * See the License for the specific language governing permissions and * limitations under the License. */ -/** -* @author Dmitry B. Yershov -* @version $Revision: 1.1.2.1.4.3 $ -*/ +/** @version $Revision: 1.1.2.1.4.3 $*/ + #ifndef LOGGER_STRING_H #define LOGGER_STRING_H Index: include/logparams.h =================================================================== --- include/logparams.h (revision 525148) +++ include/logparams.h (working copy) @@ -1,10 +1,11 @@ -/* - * Copyright 2005-2006 The Apache Software Foundation or its licensors, as applicable. +/** + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. + * The ASF licenses this file to You under the Apache License, Version 2.0 + * (the "License"); you may not use this file except in compliance with + * the License. You may obtain a copy of the License at * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * * http://www.apache.org/licenses/LICENSE-2.0 * * Unless required by applicable law or agreed to in writing, software @@ -13,9 +14,6 @@ * See the License for the specific language governing permissions and * limitations under the License. */ -/** -* @author Dmitry B. Yershov -*/ #ifndef LOG_PARAMS_H #define LOG_PARAMS_H Index: include/m2n.h =================================================================== --- include/m2n.h (revision 525148) +++ include/m2n.h (working copy) @@ -1,6 +1,6 @@ -/* +/** * Licensed to the Apache Software Foundation (ASF) under one or more - * contributor license agreements. See the NOTICE file distributed with + * contributor license agreements. See the NOTICE file distributed with * this work for additional information regarding copyright ownership. * The ASF licenses this file to You under the Apache License, Version 2.0 * (the "License"); you may not use this file except in compliance with @@ -14,30 +14,43 @@ * See the License for the specific language governing permissions and * limitations under the License. */ -/** - * @author Intel, Evgueni Brevnov, Ivan Volosyuk - * @version $Revision: 1.1.2.1.4.4 $ - */ +/** @version $Revision: 1.1.2.1.4.4 $*/ + #ifndef _M2N_H_ #define _M2N_H_ - +/** + * @file + * Managed to native frame (M2nFrame) abstraction description. + * + * @sa \ref m2ndetails + */ #include "object_handles.h" #include "open/types.h" #include "vm_core_types.h" -// This module is for the "managed to native frame" abstraction, M2nFrame. -// An M2nFrame sits on the activation stack immediately above a managed -// frame and immediately below a native frame. All managed to native code -// transitions should involve pushing an M2nFrame with the following exceptions: -// Code that does not enable GC (note that calling managed code enables GC), -// throw exceptions, or inspects the stack does not need to push an M2nFrame. -// All other code must. -// M2nFrames are linked together in the order they are pushed onto the -// activation stack, and each thread has a pointer to the most recent M2nFrame. -// Each M2nFrame contains a list of local object handles, can identify the -// location of the return address into the managed frame that preceeds it, -// and is optionally associated with a native method. +/** + * @page m2ndetails M2nFrame Detailes + * An M2nFrame sits on the activation stack immediately above a + * managed frame and immediately below a native frame. All managed to native + * code transitions should involve pushing an M2nFrame with the + * following exceptions: + * Code that does not enable GC (note that calling managed code enables GC), + * throw exceptions, or inspects the stack does not need to push an + * M2nFrame. + * All other code must. + * M2nFrames are linked together in the order they are pushed onto + * the activation stack, and each thread has a pointer to the most recent + * M2nFrame. Each M2nFrame contains a list of local + * object handles, can identify the location of the return address into the + * managed frame that preceeds it, and is optionally associated with a native + * method. + * + * The pushing and popping of native frames is done only by stubs that + * implement the managed to native transitions. These stubs use code that is + * necessarily architecture specific and some facilities that are not needed + * by other clients of this code, so this part of the interface is described + * elsewhere.*/ struct M2nFrame; @@ -59,95 +72,110 @@ FRAME_MODIFIED_STACK = 0x1000 }; -// The pushing and popping of native frames is done only by stubs that -// implement the managed to native transitions. These stubs use code that is -// necessarily architecture specific and some facilities that are not needed -// by other clients of this code, so this part of the interface is described -// elsewhere. -// fill m2n frame as empty +/** Fill M2nFrame as empty.*/ void m2n_null_init(M2nFrame *); -// Get the most recent M2nFrame of the current thread +/** Get the most recent M2nFrame of the current thread.*/ VMEXPORT // temporary solution for interpreter unplug M2nFrame* m2n_get_last_frame(); -// Set the most recent M2nFrame of the current thread -// The caller must ensure the frame is on the current thread's activation stack +/** + * Set the most recent M2nFrame of the current thread. + * The caller must ensure the frame is on the current thread's activation + * stack. + */ VMEXPORT // temporary solution for interpreter unplug void m2n_set_last_frame(M2nFrame *); -// Set the most recent M2nFrame of given thread -// The caller must ensure the frame is on the thread's activation stack +/** + * Set the most recent M2nFrame of given thread. The caller + * must ensure the frame is on the thread's activation stack. + */ VMEXPORT void m2n_set_last_frame(VM_thread *, M2nFrame *); -// Get the most recent M2nFrame of the given thread +/** Get the most recent M2nFrame of the given thread.*/ VMEXPORT // temporary solution for interpreter unplug M2nFrame* m2n_get_last_frame(VM_thread *); -// Get the previous M2nFrame to the given one +/** Get the previous M2nFrame to the given one.*/ VMEXPORT // temporary solution for interpreter unplug M2nFrame* m2n_get_previous_frame(M2nFrame *); -// Get the local object handles for the M2nFrame +/** Get the local object handles for the M2nFrame.*/ VMEXPORT // temporary solution for interpreter unplug ObjectHandles* m2n_get_local_handles(M2nFrame *); -// Set the local object handles -// Note that this just updates the list, it does not free the old list +/** + * Set the local object handles. + * + * @note This just updates the list, it does not free the old list. + */ VMEXPORT // temporary solution for interpreter unplug void m2n_set_local_handles(M2nFrame *, ObjectHandles *); -// Get the return address into the preceding managed frame +/** Get the return address into the preceding managed frame.*/ NativeCodePtr m2n_get_ip(M2nFrame *); -// ? 20040708 New function - needs proper implementation. -// Set the return address into the preceding managed frame +/** + *? 20040708 New function - needs proper implementation. + * Set the return address into the preceding managed frame. + */ void m2n_set_ip(M2nFrame *, NativeCodePtr); -// Get the native method associated with the transition to native code -// or NULL if no such association. +/** + * Get the native method associated with the transition to native code + * or NULL if no such association. + */ Method_Handle m2n_get_method(M2nFrame *); -// Returns type of noted m2n frame +/** Returns type of noted M2nFrame.*/ frame_type m2n_get_frame_type(M2nFrame *); -// Sets type of noted m2n frame +/** Sets type of noted M2nFrame.*/ void m2n_set_frame_type(M2nFrame *, frame_type); -// Returns size of m2n frame +/** Returns size of M2nFrame.*/ size_t m2n_get_size(); -// Push a special M2nFrame for managed code suspended by the OS in say -// a signal handler or exception filter. -// The frame can be popped by setting the last frame to a prior frame +/** + * Push a special M2nFrame for managed code suspended by the OS in say + * a signal handler or exception filter. + * The frame can be popped by setting the last frame to a prior frame. + */ void m2n_push_suspended_frame(M2nFrame* m2nf, Registers* regs); -// Push a special M2nFrame for managed code suspended by the OS in say -// a signal handler or exception filter. -// The frame can be popped by setting the last frame to a prior frame +/** + * Push a special M2nFrame for managed code suspended by the OS in say + * a signal handler or exception filter. + * The frame can be popped by setting the last frame to a prior frame. + */ void m2n_push_suspended_frame(VM_thread* thread, M2nFrame* m2nf, Registers* regs); -// Push a special M2nFrame for managed code suspended by the OS in say -// a signal handler or exception filter. The frame is allocated in the heap. -// It can be popped by setting the last frame to a prior frame -// and then calling free on the frame pointer. +/** + * Push a special M2nFrame for managed code suspended by the OS in + * say a signal handler or exception filter. The frame is allocated in the heap. + * It can be popped by setting the last frame to a prior frame and then calling + * free on the frame pointer. + */ M2nFrame* m2n_push_suspended_frame(Registers *); -// Push a special M2nFrame for managed code suspended by the OS in -// signal handler or exception filter. The frame is allocated in the heap. -// The frame can be popped by setting the last frame to a prior frame -// and then calling free on the frame. +/** + * Push a special M2nFrame for managed code suspended by the OS in + * signal handler or exception filter. The frame is allocated in the heap. + * The frame can be popped by setting the last frame to a prior frame + * and then calling free on the frame. + */ M2nFrame* m2n_push_suspended_frame(VM_thread *, Registers *); -// answers true if passed in m2n frame represents suspended frame +/** Answers true if passed in M2nFrame represents suspended frame.*/ bool m2n_is_suspended_frame(M2nFrame *); -// returns pointer to the registers used for jvmti PopFrame +/** Returns pointer to the registers used for jvmti PopFrame.*/ Registers* get_pop_frame_registers(M2nFrame* ); -// sets pointer to the registers used for jvmti PopFrame +/** Sets pointer to the registers used for jvmti PopFrame.*/ void set_pop_frame_registers(M2nFrame* , Registers*); #endif //!_M2N_H_ Index: include/platform_core_natives.h =================================================================== --- include/platform_core_natives.h (revision 525148) +++ include/platform_core_natives.h (working copy) @@ -1,10 +1,10 @@ -/* +/** * Licensed to the Apache Software Foundation (ASF) under one or more - * contributor license agreements. See the NOTICE file distributed with + * contributor license agreements. See the NOTICE file distributed with * this work for additional information regarding copyright ownership. * The ASF licenses this file to You under the Apache License, Version 2.0 * (the "License"); you may not use this file except in compliance with - * the License. You may obtain a copy of the License at + * the License. You may obtain a copy of the License at * * http://www.apache.org/licenses/LICENSE-2.0 * @@ -14,18 +14,17 @@ * See the License for the specific language governing permissions and * limitations under the License. */ -/** - * @author Euguene Ostrovsky - * @version $Revision: 1.1.2.1.4.5 $ - */ +/** @version $Revision: 1.1.2.1.4.5 $*/ + #ifndef _PLATFORM_CORE_NATIVES_H_ #define _PLATFORM_CORE_NATIVES_H_ - #include "jni.h" // TIME +/** + */ jlong get_current_time(); #endif // _PLATFORM_CORE_NATIVES_H_ Index: include/port_atomic.h =================================================================== --- include/port_atomic.h (revision 525148) +++ include/port_atomic.h (working copy) @@ -1,10 +1,10 @@ -/* +/** * Licensed to the Apache Software Foundation (ASF) under one or more - * contributor license agreements. See the NOTICE file distributed with + * contributor license agreements. See the NOTICE file distributed with * this work for additional information regarding copyright ownership. * The ASF licenses this file to You under the Apache License, Version 2.0 * (the "License"); you may not use this file except in compliance with - * the License. You may obtain a copy of the License at + * the License. You may obtain a copy of the License at * * http://www.apache.org/licenses/LICENSE-2.0 * @@ -14,11 +14,10 @@ * See the License for the specific language governing permissions and * limitations under the License. */ -/** -* @author Intel, Evgueni Brevnov -* @version $Revision: 1.1.2.1.4.3 $ -*/ +/** @version $Revision: 1.1.2.1.4.3 $*/ +/** + */ #ifndef _PORT_ATOMIC_H_ #define _PORT_ATOMIC_H_ @@ -31,13 +30,12 @@ #include "port_general.h" /** - * @defgroup port_atomic Atomic operations + * @defgroup port_atomic Atomic Operations * * All atomic operations are perfomance critical, * thus they are defined as inlined for most platforms in this file. * @ingroup port_apr - * @{ - */ + * @{*/ #ifdef __cplusplus extern "C" { @@ -52,45 +50,47 @@ #endif #endif - #if defined(_IPF_) || defined(DOXYGEN) /** -* The atomic compare and exchange operation on uint8. -* The function compares the current value of the specified data -* with the comp value and if they match, swaps the data -* with the value. -* @param[in, out] data - the pointer to the value -* @param[in] value - the new value -* @param[in] comp - the value to compare with -* @return The old value. -*/ + * The atomic compare and exchange operation on uint8. + * The function compares the current value of the specified data + * with the comp value and if they match, swaps the data + * with the value. + * + * @param[in, out] data - the pointer to the value + * @param[in] value - the new value + * @param[in] comp - the value to compare with + * @return The old value. + */ APR_DECLARE(uint8) port_atomic_cas8(volatile uint8 * data, uint8 value, uint8 comp); -/** -* The atomic compare and exchange operation on uint16. -* The function compares the current value of the specified data -* with the comp value and if they match, swaps the data -* with the value. -* @param[in, out] data - the pointer to the value -* @param[in] value - the new value -* @param[in] comp - the value to compare with -* @return The old value. -*/ +/** + * The atomic compare and exchange operation on uint16. + * The function compares the current value of the specified data + * with the comp value and if they match, swaps the data + * with the value. + * + * @param[in, out] data - the pointer to the value + * @param[in] value - the new value + * @param[in] comp - the value to compare with + * @return The old value. + */ APR_DECLARE(uint16) port_atomic_cas16(volatile uint16 * data, uint16 value, uint16 comp); -/** -* The atomic compare and exchange operation on uint64. -* The function compares the current value of the specified data -* with the comp value and if they match, swaps the data -* with the value. -* @param[in, out] data - the pointer to the value -* @param[in] value - the new value -* @param[in] comp - the value to compare with -* @return The old value. -*/ +/** + * The atomic compare and exchange operation on uint64. + * The function compares the current value of the specified data + * with the comp value and if they match, swaps the data + * with the value. + * + * @param[in, out] data - the pointer to the value + * @param[in] value - the new value + * @param[in] comp - the value to compare with + * @return The old value. + */ APR_DECLARE(uint64) port_atomic_cas64(volatile uint64 * data, uint64 value, uint64 comp); Index: include/port_disasm.h =================================================================== --- include/port_disasm.h (revision 525148) +++ include/port_disasm.h (working copy) @@ -1,10 +1,10 @@ -/* +/** * Licensed to the Apache Software Foundation (ASF) under one or more - * contributor license agreements. See the NOTICE file distributed with + * contributor license agreements. See the NOTICE file distributed with * this work for additional information regarding copyright ownership. * The ASF licenses this file to You under the Apache License, Version 2.0 * (the "License"); you may not use this file except in compliance with - * the License. You may obtain a copy of the License at + * the License. You may obtain a copy of the License at * * http://www.apache.org/licenses/LICENSE-2.0 * @@ -14,10 +14,8 @@ * See the License for the specific language governing permissions and * limitations under the License. */ -/** - * @author Evgueni Brevnov - * @version $Revision: 1.1.2.1.4.4 $ - */ + +/* @version $Revision: 1.1.2.1.4.4 $*/ #ifndef _DISASM_H_ #define _DISASM_H_ @@ -32,7 +30,7 @@ /** * @file -* Provides information on dynamically-generated code +* Information on dynamically-generated code */ /** Index: include/port_dso.h =================================================================== --- include/port_dso.h (revision 525148) +++ include/port_dso.h (working copy) @@ -1,10 +1,10 @@ -/* +/** * Licensed to the Apache Software Foundation (ASF) under one or more - * contributor license agreements. See the NOTICE file distributed with + * contributor license agreements. See the NOTICE file distributed with * this work for additional information regarding copyright ownership. * The ASF licenses this file to You under the Apache License, Version 2.0 * (the "License"); you may not use this file except in compliance with - * the License. You may obtain a copy of the License at + * the License. You may obtain a copy of the License at * * http://www.apache.org/licenses/LICENSE-2.0 * @@ -14,18 +14,16 @@ * See the License for the specific language governing permissions and * limitations under the License. */ -/** -* @author Alexey V. Varlamov -* @version $Revision: 1.1.2.1.4.3 $ -*/ +/** @version $Revision: 1.1.2.1.4.3 $*/ + #ifndef _PORT_DSO_H_ #define _PORT_DSO_H_ /** -* @file -* Dynamic binaries handling -*/ + * @file + * Dynamic binaries handling + */ #include "open/types.h" #include "port_general.h" @@ -63,43 +61,45 @@ /** The APR-default binding mode flag (?) */ #define PORT_DSO_DEFAULT 0 /** -* Eager mode flag: the resolution/relocation of dynamic symbols should -* be performed at library loading. -*/ + * Eager mode flag: the resolution/relocation of dynamic symbols should + * be performed at library loading. + */ #define PORT_DSO_BIND_NOW 0x1 /** -* Lazy mode flag: the resolution/relocation of dynamic symbols should -* be deferred until reference to the symbol encountered. -*/ + * Lazy mode flag: the resolution/relocation of dynamic symbols should + * be deferred until reference to the symbol encountered. + */ #define PORT_DSO_BIND_DEFER 0x2 /** @} */ /** -* Loads the shared binary file, an executable or a library. -* @param[out] handle - a handle to the loaded object -* @param path - the path to the binary -* @param mode - the flag to control resolution/relocation of dynamic symbols in - the loaded object, see PORT_DSO_BIND_* defines. -* @param pool - storage to allocate the returned handle -* @return APR_SUCCESS if OK; otherwise, an error code. -*/ + * Loads the shared binary file, an executable or a library. + * + * @param[out] handle - a handle to the loaded object + * @param path - the path to the binary + * @param mode - the flag to control resolution/relocation of dynamic symbols in + * the loaded object, see PORT_DSO_BIND_* defines. + * @param pool - storage to allocate the returned handle + * @return APR_SUCCESS if OK, otherwise an error code. + */ APR_DECLARE(apr_status_t) port_dso_load_ex(apr_dso_handle_t** handle, const char* path, uint32 mode, apr_pool_t* pool); - /** -* Returns the list of directories wher the OS searches for libraries. -* @param[out] path - the pointer to the path list -* @param pool - the storage to allocate the returned buffer -* @return APR_SUCCESS if OK; otherwise, an error code. -*/ + * Returns the list of directories wher the OS searches for libraries. + * + * @param[out] path - the pointer to the path list + * @param pool - the storage to allocate the returned buffer + * @return APR_SUCCESS if OK, otherwise, an error code. + */ APR_DECLARE(apr_status_t) port_dso_search_path(char** path, apr_pool_t* pool); /** * Decorates shared library name (.dll <-> lib*.so). + * * @param dl_name - the name of the shared library * @param pool - storage to allocate the returned handle * @return The platform-specific filename for the library. Index: include/port_filepath.h =================================================================== --- include/port_filepath.h (revision 525148) +++ include/port_filepath.h (working copy) @@ -1,10 +1,10 @@ -/* +/** * Licensed to the Apache Software Foundation (ASF) under one or more - * contributor license agreements. See the NOTICE file distributed with + * contributor license agreements. See the NOTICE file distributed with * this work for additional information regarding copyright ownership. * The ASF licenses this file to You under the Apache License, Version 2.0 * (the "License"); you may not use this file except in compliance with - * the License. You may obtain a copy of the License at + * the License. You may obtain a copy of the License at * * http://www.apache.org/licenses/LICENSE-2.0 * @@ -14,19 +14,16 @@ * See the License for the specific language governing permissions and * limitations under the License. */ -/** -* @author Alexey V. Varlamov -* @version $Revision: 1.1.2.1.4.3 $ -*/ +/** @version $Revision: 1.1.2.1.4.3 $*/ + #ifndef _PORT_FILEPATH_H_ #define _PORT_FILEPATH_H_ /** -* @file -* Filepath manipulation routines -* -*/ + * @file + * Filepath manipulation routines + */ #include "port_general.h" #include @@ -45,13 +42,19 @@ * @{ */ #ifdef DOXYGEN -/** The platform-specific file name separator char delimiting entities in a filepath. */ +/** + * The platform-specific file name separator char delimiting entities in a + * filepath. + */ #define PORT_FILE_SEPARATOR -/** The platform-specific file path separator char delimiting filepaths in a path list. */ +/** + * The platform-specific file path separator char delimiting filepaths in a + * path list. + */ #define PORT_PATH_SEPARATOR -/** The platform-specific file name separator as a string. */ +/** The platform-specific file name separator as a string.*/ #define PORT_FILE_SEPARATOR_STR -/** The platform-specific file name separator as a string. */ +/** The platform-specific file name separator as a string.*/ #define PORT_PATH_SEPARATOR_STR #endif /** @} */ @@ -69,34 +72,36 @@ #endif /** -* Sticks together filepath parts delimiting them by a platform-specific file separator. -* A typical example is obtaining a path to file by the directory path and the file name. -* @param root - the beginning of the file path -* @param trail - the ending of the file path -* @return The resulting filepath. -*/ + * Sticks together filepath parts delimiting them by a platform-specific file + * separator. + * A typical example is obtaining a path to file by the directory path and the + * file name. + * + * @param root - the beginning of the file path + * @param trail - the ending of the file path + * @return The resulting filepath. + */ APR_DECLARE(char *) port_filepath_merge(const char* root, const char* trail, apr_pool_t* pool); - /** -* Provides the canonical form of the specified path. -* This means that the function returns the standardized absolute path to a resource -* that can be addressed via different file paths. -* The canonical form is reasonable to use as a resource identifier. -* @note The canonical form cannot be guaranteed to be the only unique name -* due to various file systems specifics. -* @param original - the path to be canonicalized -* @param pool - the pool to allocate return buffer -* @return The canonical name of the specified path. -*/ + * Provides the canonical form of the specified path. + * This means that the function returns the standardized absolute path to a + * resource that can be addressed via different file paths. + * The canonical form is reasonable to use as a resource identifier. + * + * @param original - the path to be canonicalized + * @param pool - the pool to allocate return buffer + * @return The canonical name of the specified path. + * @note The canonical form cannot be guaranteed to be the only unique name + * due to various file systems specifics. + */ APR_DECLARE(char*) port_filepath_canonical(const char* original, apr_pool_t* pool); /** @} */ - #ifdef __cplusplus } #endif Index: include/port_general.h =================================================================== --- include/port_general.h (revision 525148) +++ include/port_general.h (working copy) @@ -1,10 +1,10 @@ -/* +/** * Licensed to the Apache Software Foundation (ASF) under one or more - * contributor license agreements. See the NOTICE file distributed with + * contributor license agreements. See the NOTICE file distributed with * this work for additional information regarding copyright ownership. * The ASF licenses this file to You under the Apache License, Version 2.0 * (the "License"); you may not use this file except in compliance with - * the License. You may obtain a copy of the License at + * the License. You may obtain a copy of the License at * * http://www.apache.org/licenses/LICENSE-2.0 * @@ -14,11 +14,9 @@ * See the License for the specific language governing permissions and * limitations under the License. */ -/** -* @author Alexey V. Varlamov -* @version $Revision: 1.1.2.1.4.3 $ -*/ - +/** @version $Revision: 1.1.2.1.4.3 $*/ +/** + */ #ifndef _PORT_GENERAL_H_ #define _PORT_GENERAL_H_ Index: include/port_malloc.h =================================================================== --- include/port_malloc.h (revision 525148) +++ include/port_malloc.h (working copy) @@ -1,10 +1,10 @@ -/* +/** * Licensed to the Apache Software Foundation (ASF) under one or more - * contributor license agreements. See the NOTICE file distributed with + * contributor license agreements. See the NOTICE file distributed with * this work for additional information regarding copyright ownership. * The ASF licenses this file to You under the Apache License, Version 2.0 * (the "License"); you may not use this file except in compliance with - * the License. You may obtain a copy of the License at + * the License. You may obtain a copy of the License at * * http://www.apache.org/licenses/LICENSE-2.0 * @@ -14,17 +14,16 @@ * See the License for the specific language governing permissions and * limitations under the License. */ -/** - * @author Evgueni Brevnov - * @version $Revision: 1.1.2.1.4.4 $ - */ +/** @version $Revision: 1.1.2.1.4.4 $*/ +/** + */ #ifndef _PORT_MALLOC_H_ #define _PORT_MALLOC_H_ #include // FIXME -// Very basic memory allocation utilities +/** Very basic memory allocation utilities*/ #define STD_FREE(p) free(p) #define STD_MALLOC(s) malloc(s) Index: include/port_sysinfo.h =================================================================== --- include/port_sysinfo.h (revision 525148) +++ include/port_sysinfo.h (working copy) @@ -1,10 +1,10 @@ -/* +/** * Licensed to the Apache Software Foundation (ASF) under one or more - * contributor license agreements. See the NOTICE file distributed with + * contributor license agreements. See the NOTICE file distributed with * this work for additional information regarding copyright ownership. * The ASF licenses this file to You under the Apache License, Version 2.0 * (the "License"); you may not use this file except in compliance with - * the License. You may obtain a copy of the License at + * the License. You may obtain a copy of the License at * * http://www.apache.org/licenses/LICENSE-2.0 * @@ -14,19 +14,15 @@ * See the License for the specific language governing permissions and * limitations under the License. */ -/** -* @author Alexey V. Varlamov -* @version $Revision: 1.1.2.1.4.3 $ -*/ +/** @version $Revision: 1.1.2.1.4.3 $*/ #ifndef _PORT_SYSINFO_H_ #define _PORT_SYSINFO_H_ /** -* @file -* System information routines -* -*/ + * @file + * System information routines. + */ #include "open/types.h" #include "port_general.h" @@ -43,6 +39,7 @@ /** * Determines the absolute path of the executing process. + * * @param[out] self_name - the pointer to the requested path string * @param pool - a pool to allocate return buffer * @return APR_SUCCESS if OK; otherwise, an error code. @@ -50,47 +47,47 @@ APR_DECLARE(apr_status_t) port_executable_name(char** self_name, apr_pool_t* pool); -/** -* Returns the number of processors in the system. -*/ +/** Returns the number of processors in the system.*/ APR_DECLARE(int) port_CPUs_number(void); -/** -* Returns the name of CPU architecture. -*/ +/** Returns the name of CPU architecture.*/ APR_DECLARE(const char *) port_CPU_architecture(void); /** -* Provides the name and version of the host operating system. -* @param[out] os_name - the pointer to the OS name string -* @param[out] os_ver - the pointer to the OS version string -* @param pool - a pool to allocate return buffers -* @return APR_SUCCESS if OK; otherwise, an error code. -*/ + * Provides the name and version of the host operating system. + * + * @param[out] os_name - the pointer to the OS name string + * @param[out] os_ver - the pointer to the OS version string + * @param pool - a pool to allocate return buffers + * @return APR_SUCCESS if OK; otherwise, an error code. + */ APR_DECLARE(apr_status_t) port_OS_name_version(char** os_name, char** os_ver, apr_pool_t* pool); /** -* Returns the name of the account under which the current process is executed. -* @param[out] account - the pointer to the requested name string -* @param pool - a pool to allocate the return buffer -* @return APR_SUCCESS if OK; otherwise, an error code. -*/ + * Returns the name of the account under which the current process is executed. + * + * @param[out] account - the pointer to the requested name string + * @param pool - a pool to allocate the return buffer + * @return APR_SUCCESS if OK; otherwise, an error code. + */ APR_DECLARE(apr_status_t) port_user_name(char** account, apr_pool_t* pool); /** -* Returns the home path of the account under which the process is executed. -* @param[out] path - the pointer to the requested path string -* @param pool - a pool to allocate return buffer -* @return APR_SUCCESS if OK; otherwise, an error code. -*/ + * Returns the home path of the account under which the process is executed. + * + * @param[out] path - the pointer to the requested path string + * @param pool - a pool to allocate return buffer + * @return APR_SUCCESS if OK; otherwise, an error code. + */ APR_DECLARE(apr_status_t) port_user_home(char** path, apr_pool_t* pool); /** - * Returns the name of current system time zone. Time zone names are defined + * Returns the name of current system time zone. Time zone names are defined * in the tz database, see ftp://elsie.nci.nih.gov/pub/. + * * @param[out] tzname - the pointer to the name string * @param pool - a pool to allocate return buffer * @return APR_SUCCESS if OK; otherwise, an error code. @@ -100,7 +97,6 @@ /** @} */ - #ifdef __cplusplus } #endif Index: include/port_timer.h =================================================================== --- include/port_timer.h (revision 525148) +++ include/port_timer.h (working copy) @@ -1,23 +1,20 @@ -/* -* Licensed to the Apache Software Foundation (ASF) under one or more -* contributor license agreements. See the NOTICE file distributed with -* this work for additional information regarding copyright ownership. -* The ASF licenses this file to You under the Apache License, Version 2.0 -* (the "License"); you may not use this file except in compliance with -* the License. You may obtain a copy of the License at -* -* http://www.apache.org/licenses/LICENSE-2.0 -* -* Unless required by applicable law or agreed to in writing, software -* distributed under the License is distributed on an "AS IS" BASIS, -* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -* See the License for the specific language governing permissions and -* limitations under the License. -*/ -/** -* @author Alexey V. Varlamov -* @version $Revision$ -*/ +/** + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. + * The ASF licenses this file to You under the Apache License, Version 2.0 + * (the "License"); you may not use this file except in compliance with + * the License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +/** @version $Revision$*/ #ifndef _PORT_TIMER_H_ #define _PORT_TIMER_H_ @@ -28,9 +25,9 @@ #endif /** -* @file -* High resolution timer -*/ + * @file + * The high resolution timer. + */ /** * @defgroup port_timer High resolution timer @@ -38,18 +35,18 @@ * @{ */ - /** - * High resolution timer, in nanoseconds. - * The timer is not tied to system clocks, rather intended for precise - * measuring of elapsed time intervals. - */ +/** + * High resolution timer, in nanoseconds. + * The timer is not tied to system clocks, rather intended for precise + * measuring of elapsed time intervals. + */ typedef apr_int64_t apr_nanotimer_t; - /** - * Returns the value of the system timer with the best possible accuracy. - * The difference between two subsequent invocations returns the number of - * passed nanoseconds. - */ +/** + * Returns the value of the system timer with the best possible accuracy. + * The difference between two subsequent invocations returns the number of + * passed nanoseconds. + */ APR_DECLARE(apr_nanotimer_t) port_nanotimer(); /** @} */ Index: include/port_vmem.h =================================================================== --- include/port_vmem.h (revision 525148) +++ include/port_vmem.h (working copy) @@ -1,10 +1,10 @@ -/* +/** * Licensed to the Apache Software Foundation (ASF) under one or more - * contributor license agreements. See the NOTICE file distributed with + * contributor license agreements. See the NOTICE file distributed with * this work for additional information regarding copyright ownership. * The ASF licenses this file to You under the Apache License, Version 2.0 * (the "License"); you may not use this file except in compliance with - * the License. You may obtain a copy of the License at + * the License. You may obtain a copy of the License at * * http://www.apache.org/licenses/LICENSE-2.0 * @@ -14,18 +14,15 @@ * See the License for the specific language governing permissions and * limitations under the License. */ -/** - * @author Alexey V. Varlamov - * @version $Revision: 1.1.2.1.4.3 $ - */ +/** @version $Revision: 1.1.2.1.4.3 $*/ #ifndef _PORT_VMEM_H_ #define _PORT_VMEM_H_ /** * @file - * Virtual memory support + * Virtual memory support. * - * Functions to manipulate memory pages in virtual address space: + * Functions to manipulate memory pages in virtual address space: * reserve, de/commit, free, control size and access protection of pages. */ @@ -57,7 +54,8 @@ /** * @defgroup vmem_size Memory page size directives - * These defines can be used instead of explicit calls to port_vmem_page_sizes(). + * These defines can be used instead of explicit calls to + * port_vmem_page_sizes(). * @{ */ /** System default page size*/ @@ -74,7 +72,8 @@ /** * Reserves a continuous memory region in the virtual address space - * of the calling process. + * of the calling process. + * * @param[out] block - descriptor for the reserved memory, required for * further operations with the memory * @param[in,out] address - desired starting address of the region to allocate. If @@ -86,10 +85,11 @@ * @param protectionMode - the bit mask of PORT_VMEM_MODE_* flags * @param pageSize - the desired size of the memory page; should contain * PORT_VMEM_PAGESIZE_DEFAULT, - * PORT_VMEM_PAGESIZE_LARGE or the actual size in bytes + * PORT_VMEM_PAGESIZE_LARGE or the actual size + * in bytes * @param pool - the auxiliary pool to allocate the descriptor data, etc * @return APR_SUCCESS if OK; otherwise, an error code. - * @see port_vmem_page_sizes() + * @sa port_vmem_page_sizes() */ APR_DECLARE(apr_status_t) port_vmem_reserve(port_vmem_t **block, void **address, size_t amount, @@ -97,42 +97,45 @@ size_t pageSize, apr_pool_t *pool); /** -* Commits (a part of) the previously reserved memory region. The allocated memory -* is initialized to zero. -* @param[in,out] address - the starting address of the region to commit; the returned value -* may differ due to page alignment -* @param amount - the size of the region in bytes -* @param block - the descriptor to the reserved virtual memory -* @return APR_SUCCESS if OK; otherwise, an error code. -*/ + * Commits (a part of) the previously reserved memory region. The allocated + * memory is initialized to zero. + * + * @param[in,out] address - the starting address of the region to commit; the + * returned value may differ due to page alignment + * @param amount - the size of the region in bytes + * @param block - the descriptor to the reserved virtual memory + * @return APR_SUCCESS if OK; otherwise, an error code. + */ APR_DECLARE(apr_status_t) port_vmem_commit(void **address, size_t amount, port_vmem_t *block); /** -* Decommits the specified region of committed memory. It is safe to -* decommit a reserved (but not committed) region. -* @param address - the starting address of the region to decommit -* @param amount - the size of the region in bytes -* @param block - the memory region descriptor -* @return APR_SUCCESS if OK; otherwise, an error code. -*/ + * Decommits the specified region of committed memory. It is safe to + * decommit a reserved (but not committed) region. + * + * @param address - the starting address of the region to decommit + * @param amount - the size of the region in bytes + * @param block - the memory region descriptor + * @return APR_SUCCESS if OK; otherwise, an error code. + */ APR_DECLARE(apr_status_t) port_vmem_decommit(void *address, size_t amount, port_vmem_t *block); /** -* Releases previously reserved virtual memory region as a whole. -* If the region was committed, the function first decommits it. -* @param block - the memory region descriptor -* @return APR_SUCCESS if OK; otherwise, an error code. -*/ + * Releases previously reserved virtual memory region as a whole. + * If the region was committed, the function first decommits it. + * + * @param block - the memory region descriptor + * @return APR_SUCCESS if OK; otherwise, an error code. + */ APR_DECLARE(apr_status_t) port_vmem_release(port_vmem_t *block); /** -* Returns a zero-terminated array of supported memory page sizes. -* The first element refers to the system default size and is guaranteed -* to be non-zero. Subsequent elements (if any) provide large page -* sizes. -*/ + * Returns a zero-terminated array of supported memory page sizes. + * The first element refers to the system default size and is guaranteed + * to be non-zero. Subsequent elements (if any) provide large page + * sizes. + */ APR_DECLARE(size_t *) port_vmem_page_sizes(); /** @} */ Index: include/stack_iterator.h =================================================================== --- include/stack_iterator.h (revision 525148) +++ include/stack_iterator.h (working copy) @@ -1,10 +1,10 @@ -/* +/** * Licensed to the Apache Software Foundation (ASF) under one or more - * contributor license agreements. See the NOTICE file distributed with + * contributor license agreements. See the NOTICE file distributed with * this work for additional information regarding copyright ownership. * The ASF licenses this file to You under the Apache License, Version 2.0 * (the "License"); you may not use this file except in compliance with - * the License. You may obtain a copy of the License at + * the License. You may obtain a copy of the License at * * http://www.apache.org/licenses/LICENSE-2.0 * @@ -14,13 +14,10 @@ * See the License for the specific language governing permissions and * limitations under the License. */ -/** - * @author Intel, Pavel Afremov - * @version $Revision: 1.1.2.1.4.3 $ - */ +/** @version $Revision: 1.1.2.1.4.3 $*/ /** - *@file + * @file * Mechanism for iterating over stack frames * of Java and native code. * @@ -30,7 +27,7 @@ *
      *
    • Managed code frames corresponding to Java * code - *
    • Managed-to-native frames (M2N) for transferring + *
    • Managed-to-native frames (M2N) for transferring * data and control between managed and native frames * * Native frames iteration is not currently supported. To iterate over @@ -62,13 +59,13 @@ * Creates a new stack iterator for the given thread. * * The thread can run concurrently with the stack iterator, - * but it must not pop (return past) the most recent M2N frame when the iterator is called. + * but it must not pop (return past) the most recent M2N frame when + * the iterator is called. * - * Creation is not atomic with respect to pushing/popping of M2N frames. - * The client code must ensure that such operations are serialized. + * Creation is not atomic with respect to pushing/popping of M2N + * frames. The client code must ensure that such operations are serialized. * * @param[in] thread - the pointer to the thread, the stack of which must be enumerated - * * @note The function assumes that the given thread is currently in native code. */ StackIterator* si_create_from_native(VM_thread* thread); @@ -77,16 +74,16 @@ * Creates a new stack iterator for the suspended thread. * * The thread can run concurrently with the stack iterator, - * but it must not pop (return past) the most recent M2N frame when the iterator is called. + * but it must not pop (return past) the most recent M2N frame + * when the iterator is called. * - * Creation is not atomic with respect to pushing/popping of M2N frames. - * The client code must ensure that such operations are serialized. + * Creation is not atomic with respect to pushing/popping of M2N + * frames. The client code must ensure that such operations are serialized. * - * @param[in] regs - values of the registers at the point of suspension - * @param[in] is_ip_past - indicate is ip past or not - * @param[in] m2nf - the pointer to the M2N frame that must be the one immediately - * prior to the suspended frame - * + * @param[in] regs - values of the registers at the point of suspension + * @param[in] is_ip_past - indicate is ip past or not + * @param[in] m2nf - the pointer to the M2N frame that must + * be the one immediately prior to the suspended frame * @note The function assumes that iterated thread is currently suspended from managed code. */ StackIterator* si_create_from_registers(Registers* regs, bool is_ip_past, M2nFrame* m2nf); @@ -94,32 +91,32 @@ /** * Makes a copy of the given stack iterator. * - * @param[in] si - the pointer to the stack iterator to be copied + * @param[in] si - the pointer to the stack iterator to be copied */ StackIterator* si_dup(StackIterator* si); /** * Frees the stack iterator. * - * @param[in] si - the pointer to the stack iterator to be freed + * @param[in] si - the pointer to the stack iterator to be freed */ void si_free(StackIterator* si); /** - * Ensures that all preserved registers are transferred from the M2N frame - * to the iterator. + * Ensures that all preserved registers are transferred from the M2N + * frame to the iterator. * - * Depending on the platform, the implementation of stack iterators and M2N frames - * may not track all preserved registers required for resuming a frame, but may instead track - * enough for root set enumeration and stack walking. + * Depending on the platform, the implementation of stack iterators and + * M2N frames may not track all preserved registers required for + * resuming a frame, but may instead track enough for root set enumeration and + * stack walking. * - * This function and the corresponding additional stub generator for M2N frames - * allow all registers to be tracked for exception propagation. + * This function and the corresponding additional stub generator for M2N + * frames allow all registers to be tracked for exception propagation. * - * @param[in] si - the poiter to the stack iterator that will contain all preserved - * registers - * - * @note Only call the function when the iterator is at an M2N frame + * @param[in] si - the poiter to the stack iterator that will contain all preserved + * registers + * @note Only call the function when the iterator is at an M2N frame * that has all preserved registers saved. */ void si_transfer_all_preserved_registers(StackIterator* si); @@ -127,27 +124,27 @@ /** * Checks whether the stack iterator has passed all the frames. * - * @param[in] si - the poiter to a StackIterator which should be tested is past all - * the frames or not. - * @return TRUE if the transferred stack iterator has passed all the frames; - * otherwise, FALSE. + * @param[in] si - the poiter to a StackIterator which should be tested is past + * all the frames or not. + * @return TRUE if the transferred stack iterator has passed all the + * frames; otherwise, FALSE. */ bool si_is_past_end(StackIterator* si ); /** * Goes to the frame previous to the current one. * - * @param[in] si - the pointer to the stack iterator that will be iterated to the previous - * frame - * @param[in] over_popped - take into account the intermediate result of pop frame operation. + * @param[in] si - the pointer to the stack iterator that will be + * iterated to the previous frame + * @param[in] over_popped - take into account the intermediate result of pop + * frame operation. */ void si_goto_previous(StackIterator* si, bool over_popped = true); /** * Gets the instruction pointer for the current frame. * - * @param[in] si - the pointer to the stack iterator indicating the current frame - * + * @param[in] si - the pointer to the stack iterator indicating the current frame * @return The instruction pointer for the current frame. */ NativeCodePtr si_get_ip(StackIterator* si); @@ -155,12 +152,13 @@ /** * Sets the instruction pointer for the current frame. * - * @param[in] si - the pointer to the stack iterator indicating - * the current frame - * @param[in] ip - the instruction pointer for the current frame - * @param[in] also_update_stack_itself - the flag indicating whether the function must update - * data on the stack or only in the iterator - * + * @param[in] si - the pointer to the stack iterator + * indicating the current frame + * @param[in] ip - the instruction pointer for the + * current frame + * @param[in] also_update_stack_itself - the flag indicating whether the function + * must update data on the stack or only in + * the iterator * @return If also_update_stack_itself is TRUE, * updates the instruction pointer in the stack; otherwise, the new * value stored in the stack iterator only. @@ -169,11 +167,11 @@ bool also_update_stack_itself = false); /** - * Sets the code chunk for the current frame of the stack indicated by the iterator. + * Sets the code chunk for the current frame of the stack indicated by the + * iterator. * - * @param[in] si - the pointer to the stack iterator indicating the current frame - * @param[in] cci - the pointer to CodeChunkInfo to be set for the current frame - * + * @param[in] si - the pointer to the stack iterator indicating the current frame + * @param[in] cci - the pointer to CodeChunkInfo to be set for the current frame * @note The function assumes that the thread is iterated in a managed frame. */ void si_set_code_chunk_info(StackIterator* si, CodeChunkInfo* cci); @@ -181,39 +179,36 @@ /** * Gets the code chunk information for the current frame. * - * @param[in] si - the pointer to the stack iterator indicating the current frame - * - * @return The pointer to the code chunk information for managed frames and NULL - * for M2N frames. + * @param[in] si - the pointer to the stack iterator indicating the current frame + * @return The pointer to the code chunk information for managed frames and + * NULL for M2N frames. */ CodeChunkInfo* si_get_code_chunk_info(StackIterator* si); /** * Gets the JIT frame context for the current frame. * - * @param[in] si - the pointer to the stack iterator indicating the current frame - * + * @param[in] si - the pointer to the stack iterator indicating the current frame * @return The JIT frame context for the current frame. */ JitFrameContext* si_get_jit_context(StackIterator* si); /** - * Checks whether the current frame is an M2N frame. + * Checks whether the current frame is an M2N frame. * - * @param[in] si - the pointer to the stack iterator indicating the current frame - * - * @return TRUE if the current thread is an M2N frame; + * @param[in] si - the pointer to the stack iterator indicating the current frame + * @return TRUE if the current thread is an M2N frame; * otherwise, FALSE. */ bool si_is_native(StackIterator* si); /** - * Gets the pointer to the M2N frame if the current frame is M2N. + * Gets the pointer to the M2N frame if the current frame is + * M2N. * - * @param[in] si - the pointer to the stack iterator indicating the current frame - * - * @return The pointer to the the M2N frame if the current frame is M2N; otherwise, - * NULL. + * @param[in] si - the pointer to the stack iterator indicating the current frame + * @return The pointer to the the M2N frame if the current frame is + * M2N; otherwise, NULL. */ M2nFrame* si_get_m2n(StackIterator* si); @@ -222,19 +217,22 @@ * * If transfer control is called, the resumed frame will see this value. * - * @param[in] si - the pointer to the stack iterator indicating the current frame - * - * @return the pointer to the pointer to the return value. + * @param[in] si - the pointer to the stack iterator indicating the + * current frame + * @return The pointer to the pointer to the return value. */ void** si_get_return_pointer(StackIterator* si); /** * Sets the pointer to the value of the return register. * - * If the transfer control is subsequently called, the resumed frame has data on this change. + * If the transfer control is subsequently called, the resumed frame has data + * on this change. * - * @param[in] si - the pointer to the stack iterator indicating the current frame - * @param[in] return_value - the pointer to the pointer to the return value that will be set + * @param[in] si - the pointer to the stack iterator indicating the + * current frame + * @param[in] return_value - the pointer to the pointer to the return value + * that will be set */ void si_set_return_pointer(StackIterator* si, void** return_value); @@ -242,9 +240,9 @@ * Thransfers control and resumes execution in the current frame of the iterator. * Returns no values and frees the stack iterator. * - * @param[in] si - the pointer to the stack iterator indicating the current frame - * - * @note This function must only be called for the iterator on the current thread's frames. + * @param[in] si - the pointer to the stack iterator indicating the current frame + * @note This function must only be called for the iterator on the current + * thread's frames. */ void si_transfer_control(StackIterator* si); @@ -253,19 +251,19 @@ * * This way, resuming these registers transfers control to the current frame. * - * @param[in] si - the pointer to the stack iterator indicating the current frame - * @param[out] regs - the pointer to the registers where the registers' values - * from the stack iterator will be copied + * @param[in] si - the pointer to the stack iterator indicating the current frame + * @param[out] regs - the pointer to the registers where the registers' values + * from the stack iterator will be copied */ void si_copy_to_registers(StackIterator* si, Registers* regs); /** * Reloads registers from the register stack. * - * - * @note On architectures with register stacks, ensure that the register stack of - * the current thread is consistent with its backing store. This is done because the backing - * store might have been modified by the stack walking code. + * @note On architectures with register stacks, ensure that the register stack +* of the current thread is consistent with its backing store. This is +* done because the backing store might have been modified by the stack + * walking code. */ void si_reload_registers(); @@ -273,7 +271,6 @@ * Gets the method handle for the frame iterated by the stack iterator. * * @param[in] si - the pointer to the stack iterator indicating the current frame - * * @return The method handle corresponding to the given stack iterator. */ Method_Handle si_get_method(StackIterator* si); @@ -283,7 +280,6 @@ * iterated by stack iterator. * * @param[in] si - the pointer to the stack iterator indicating the current frame - * * @return The number of inlined methods. */ uint32 si_get_inline_depth(StackIterator* si); @@ -291,8 +287,8 @@ /** * Gets the method handle for the frame iterated by the stack iterator. * - * @param[in] si - the pointer to the stack iterator indicating the frame, - * from which control will be transfered + * @param[in] si - the pointer to the stack iterator indicating the frame, + * from which control will be transfered * @param[in] callback - pointer to the native cose adress which should be * called, after transfer control */ Index: include/tl/allocator.h =================================================================== --- include/tl/allocator.h (revision 525148) +++ include/tl/allocator.h (working copy) @@ -1,10 +1,10 @@ -/* +/** * Licensed to the Apache Software Foundation (ASF) under one or more - * contributor license agreements. See the NOTICE file distributed with + * contributor license agreements. See the NOTICE file distributed with * this work for additional information regarding copyright ownership. * The ASF licenses this file to You under the Apache License, Version 2.0 * (the "License"); you may not use this file except in compliance with - * the License. You may obtain a copy of the License at + * the License. You may obtain a copy of the License at * * http://www.apache.org/licenses/LICENSE-2.0 * @@ -14,10 +14,7 @@ * See the License for the specific language governing permissions and * limitations under the License. */ -/** - * @author Intel, Evgueni Brevnov - * @version $Revision: 1.1.2.1.4.3 $ - */ +/** @version $Revision: 1.1.2.1.4.3 $*/ #ifndef TL_ALLOCATOR_H #define TL_ALLOCATOR_H @@ -26,23 +23,22 @@ namespace tl { - /** - * An allocator based on the basic memory allocation primitives. - */ +/** An allocator based on the basic memory allocation primitives.*/ template class BasicAllocator { public: - // Default constructor. + +/** Default constructor.*/ BasicAllocator() {} - // Copy constructor. +/** Copy constructor.*/ template BasicAllocator(const BasicAllocator& allocator) {} - // Destructor. +/** Destructor.*/ ~BasicAllocator() {} - // Underlying pointer, reference, etc types for this allocator. +/** Underlying pointer, reference, etc types for this allocator.*/ typedef T* pointer; typedef const T* const_pointer; typedef T& reference; @@ -51,11 +47,11 @@ typedef size_t size_type; typedef ptrdiff_t difference_type; - // Pointer/reference conversion. +/** Pointer/reference conversion.*/ pointer address(reference x) const { return &x; } const_pointer address(const_reference x) const { return &x; } - // Allocation/deallocation operations. +/** Allocation/deallocation operations.*/ pointer allocate(size_type n, const void* = 0) { pointer p = (pointer) STD_MALLOC(n * sizeof(T)); @@ -67,43 +63,39 @@ //STD_FREE(p); } - // Maximum allocatable size based upon size_type. +/** Maximum allocatable size based upon size_type.*/ size_type max_size() const { return ((size_type) -1) / sizeof(value_type); } - // Initialization/finalization operations. +/** Initialization/finalization operations.*/ void construct(pointer p, const value_type& x) { new (p) value_type(x); } void destroy(pointer p) { p->~value_type(); } - // Allocator equality tests +/** Allocator equality tests*/ template bool operator==(const BasicAllocator& allocator) { return TRUE; } template bool operator!=(const BasicAllocator& allocator) { return FALSE; } - // Type conversion utility to obtain BasicAllocator for different underlying type. +/** Type conversion utility to obtain BasicAllocator for different underlying type.*/ template struct rebind { typedef BasicAllocator other; }; }; - - - /** - * A MemoryPool based STL allocator. - */ +/** A MemoryPool based STL allocator.*/ template class MPAllocator { public: - // Standard constructor +/** Standard constructor.*/ MPAllocator(MemoryPool& mp) : pmp(&mp) {} - // Copy constructor. +/** Copy constructor.*/ template MPAllocator(const MPAllocator& allocator) : pmp(&allocator.getMemoryPool()) {} - // Destructor. +/** Destructor.*/ ~MPAllocator() {} - // Underlying pointer, reference, etc types for this allocator. +/** Underlying pointer, reference, etc types for this allocator.*/ typedef T* pointer; typedef const T* const_pointer; typedef T& reference; @@ -112,14 +104,14 @@ typedef size_t size_type; typedef ptrdiff_t difference_type; - // Pointer/reference conversion. +/** Pointer/reference conversion.*/ pointer address(reference x) const { return &x; } const_pointer address(const_reference x) const { return &x; } - // Underlying MemoryPool. +/** Underlying MemoryPool.*/ MemoryPool& getMemoryPool() const { return *pmp; } - // Allocation/deallocation operations. +/** Allocation/deallocation operations.*/ pointer allocate(size_type n, const void* = 0) { pointer p = (pointer) pmp->alloc(n * sizeof(T)); @@ -128,24 +120,27 @@ } void deallocate(void *p, size_type) {} - // Maximum allocatable size based upon size_type. +/** Maximum allocatable size based upon size_type.*/ size_type max_size() const { return ((size_type) -1) / sizeof(value_type); } - // Initialization/finalization operations. +/** Initialization/finalization operations.*/ void construct(pointer p, const value_type& x) { new (p) value_type(x); } void destroy(pointer p) { p->~value_type(); } - // Allocator equality tests +/** Allocator equality tests.*/ template bool operator==(const MPAllocator& allocator) { return pmp == allocator.pmp; } template bool operator!=(const MPAllocator& allocator) { return pmp != allocator.pmp; } - // Type conversion utility to obtain MPAllocator for different underlying type. +/** + * Type conversion utility to obtain MPAllocator for different + * underlying type. + */ template struct rebind { typedef MPAllocator other; }; private: - // Disable. Cannot be instantiated without a MemoryPool. +/** Disable. Cannot be instantiated without a MemoryPool.*/ MPAllocator(); MemoryPool* pmp; Index: include/tl/list_mt.h =================================================================== --- include/tl/list_mt.h (revision 525148) +++ include/tl/list_mt.h (working copy) @@ -1,10 +1,10 @@ -/* +/** * Licensed to the Apache Software Foundation (ASF) under one or more - * contributor license agreements. See the NOTICE file distributed with + * contributor license agreements. See the NOTICE file distributed with * this work for additional information regarding copyright ownership. * The ASF licenses this file to You under the Apache License, Version 2.0 * (the "License"); you may not use this file except in compliance with - * the License. You may obtain a copy of the License at + * the License. You may obtain a copy of the License at * * http://www.apache.org/licenses/LICENSE-2.0 * @@ -14,18 +14,13 @@ * See the License for the specific language governing permissions and * limitations under the License. */ -/** - * @author Intel, Evgueni Brevnov - * @version $Revision: 1.1.2.1.4.3 $ - */ -/** - * This file is a part of tool library. - */ + +/** @version $Revision: 1.1.2.1.4.3 $*/ + +/** This file is a part of tool library.*/ namespace tl { - /** - * Linked list interface. - */ +/** Linked list interface.*/ template @@ -58,11 +53,11 @@ } bool Contains(_Key _key); - /** - * Return an iterator. Collection should be locked - * to iterate over the iterator. - * Destruction of iterator unlocks collecton. - */ +/** + * Return an iterator. Collection should be locked + * to iterate over the iterator. + * Destruction of iterator unlocks collecton. + */ Iterator GetIterator(); } // ListElement } // tl Index: include/tl/memory_pool.h =================================================================== --- include/tl/memory_pool.h (revision 525148) +++ include/tl/memory_pool.h (working copy) @@ -1,10 +1,10 @@ -/* +/** * Licensed to the Apache Software Foundation (ASF) under one or more - * contributor license agreements. See the NOTICE file distributed with + * contributor license agreements. See the NOTICE file distributed with * this work for additional information regarding copyright ownership. * The ASF licenses this file to You under the Apache License, Version 2.0 * (the "License"); you may not use this file except in compliance with - * the License. You may obtain a copy of the License at + * the License. You may obtain a copy of the License at * * http://www.apache.org/licenses/LICENSE-2.0 * @@ -14,10 +14,7 @@ * See the License for the specific language governing permissions and * limitations under the License. */ -/** - * @author Evgueni Brevnov - * @version $Revision: 1.1.2.1.4.4 $ - */ +/** @version $Revision: 1.1.2.1.4.4 $*/ #ifndef TL_MEMORY_POOL_H #define TL_MEMORY_POOL_H @@ -59,14 +56,10 @@ MemoryPoolMT(const MemoryPoolMT* parent); ~MemoryPoolMT(); - /** - * Thread safe memory allocation. - */ +/** Thread safe memory allocation.*/ void *alloc(size_t size); - /** - * Thread safe mutex allocation / creation. - */ +/** Thread safe mutex allocation / creation.*/ apr_status_t create_mutex(apr_thread_mutex_t**, unsigned int flags); }; Index: include/tl/set.h =================================================================== --- include/tl/set.h (revision 525148) +++ include/tl/set.h (working copy) @@ -1,10 +1,10 @@ -/* +/** * Licensed to the Apache Software Foundation (ASF) under one or more - * contributor license agreements. See the NOTICE file distributed with + * contributor license agreements. See the NOTICE file distributed with * this work for additional information regarding copyright ownership. * The ASF licenses this file to You under the Apache License, Version 2.0 * (the "License"); you may not use this file except in compliance with - * the License. You may obtain a copy of the License at + * the License. You may obtain a copy of the License at * * http://www.apache.org/licenses/LICENSE-2.0 * @@ -14,10 +14,7 @@ * See the License for the specific language governing permissions and * limitations under the License. */ -/** - * @author Intel, Evgueni Brevnov - * @version $Revision: 1.1.2.1.4.3 $ - */ +/** @version $Revision: 1.1.2.1.4.3 $*/ #ifndef STL_VECTOR_MT_H #define STL_VECTOR_MT_H @@ -30,9 +27,7 @@ namespace tl { - /** - * A MemoryManager-based STL sorted vector container to use as a set. - **/ +/** A MemoryManager-based STL sorted vector container to use as a set.*/ template > class vector_set : public ::std::vector { Index: include/tl/set_mt.h =================================================================== --- include/tl/set_mt.h (revision 525148) +++ include/tl/set_mt.h (working copy) @@ -1,10 +1,10 @@ -/* +/** * Licensed to the Apache Software Foundation (ASF) under one or more - * contributor license agreements. See the NOTICE file distributed with + * contributor license agreements. See the NOTICE file distributed with * this work for additional information regarding copyright ownership. * The ASF licenses this file to You under the Apache License, Version 2.0 * (the "License"); you may not use this file except in compliance with - * the License. You may obtain a copy of the License at + * the License. You may obtain a copy of the License at * * http://www.apache.org/licenses/LICENSE-2.0 * @@ -14,10 +14,7 @@ * See the License for the specific language governing permissions and * limitations under the License. */ -/** - * @author Intel, Evgueni Brevnov - * @version $Revision: 1.1.2.1.4.3 $ - */ +/** @version $Revision: 1.1.2.1.4.3 $*/ #ifndef TL_SET_MT_H #define TL_SET_MT_H @@ -35,10 +32,9 @@ namespace tl { - /** - * A MemoryManager-based STL sorted vector container to use - * as a set. - */ + /** A MemoryManager-based STL sorted vector container to use + * as a set. + */ template > class vector_set_mt : public ::std::vector { @@ -49,15 +45,11 @@ MemoryPool mem_pool; public: - /** - * Lock container access. Use it before accessing iterators. - */ +/** Lock container access. Use it before accessing iterators.*/ void lock() { apr_thread_mutex_lock(mutex); } - /** - * Unock container access. - */ +/** Unock container access.*/ void unlock() { apr_thread_mutex_unlock(mutex); } Index: include/tl/vector.h =================================================================== --- include/tl/vector.h (revision 525148) +++ include/tl/vector.h (working copy) @@ -1,10 +1,10 @@ -/* +/** * Licensed to the Apache Software Foundation (ASF) under one or more - * contributor license agreements. See the NOTICE file distributed with + * contributor license agreements. See the NOTICE file distributed with * this work for additional information regarding copyright ownership. * The ASF licenses this file to You under the Apache License, Version 2.0 * (the "License"); you may not use this file except in compliance with - * the License. You may obtain a copy of the License at + * the License. You may obtain a copy of the License at * * http://www.apache.org/licenses/LICENSE-2.0 * @@ -14,26 +14,20 @@ * See the License for the specific language governing permissions and * limitations under the License. */ -/** - * @author Intel, Evgueni Brevnov - * @version $Revision: 1.1.2.1.4.3 $ - */ +/** @version $Revision: 1.1.2.1.4.3 $*/ #ifndef TL_VECTOR_H #define TL_VECTOR_H /** - * This is just wrapper for the current STL vector - * implementation - * with default memory allocator replaced. + * This is just wrapper for the current STL vector implementation with + * default memory allocator replaced. */ #include "tl/allocator.h" #include namespace tl { - /** - * A MemoryManager-based STL vector container. - */ +/** A MemoryManager-based STL vector container.*/ template > class vector : public ::std::vector { Index: include/tl/vector_mt.h =================================================================== --- include/tl/vector_mt.h (revision 525148) +++ include/tl/vector_mt.h (working copy) @@ -1,10 +1,10 @@ -/* +/** * Licensed to the Apache Software Foundation (ASF) under one or more - * contributor license agreements. See the NOTICE file distributed with + * contributor license agreements. See the NOTICE file distributed with * this work for additional information regarding copyright ownership. * The ASF licenses this file to You under the Apache License, Version 2.0 * (the "License"); you may not use this file except in compliance with - * the License. You may obtain a copy of the License at + * the License. You may obtain a copy of the License at * * http://www.apache.org/licenses/LICENSE-2.0 * @@ -14,17 +14,14 @@ * See the License for the specific language governing permissions and * limitations under the License. */ -/** - * @author Intel, Evgueni Brevnov - * @version $Revision: 1.1.2.1.4.3 $ - */ +/** @version $Revision: 1.1.2.1.4.3 $*/ #ifndef TL_VECTOR_MT_H #define TL_VECTOR_MT_H // FIXME this should be thread safe vector implementation with // custom memory allocator. // But now this is just wrapper for the current STL vector -// implementation +// implementation. #include "tl/vector.h" #include "log_macro.h" @@ -34,9 +31,7 @@ namespace tl { - /** - * Thread safe vector. - */ +/** Thread safe vector.*/ template > class vector_mt : public ::std::vector { @@ -57,21 +52,15 @@ ABORT("Couldn't create mutex"); } } - /** - * Lock container access. Use it before accessing iterators. - */ +/** Lock container access. Use it before accessing iterators.*/ void lock() { apr_thread_mutex_lock(mutex); } - /** - * Unock container access. - */ +/** Unock container access.*/ void unlock() { apr_thread_mutex_unlock(mutex); } - /** - * Add an element to the end of the vector. - */ +/** Add an element to the end of the vector.*/ void push_back(const T& val) { lock(); std_vector::push_back(val); Index: src/encoder/ia32_em64t/dec_base.h =================================================================== --- src/encoder/ia32_em64t/dec_base.h (revision 525148) +++ src/encoder/ia32_em64t/dec_base.h (working copy) @@ -1,6 +1,6 @@ -/* +/** * Licensed to the Apache Software Foundation (ASF) under one or more - * contributor license agreements. See the NOTICE file distributed with + * contributor license agreements. See the NOTICE file distributed with * this work for additional information regarding copyright ownership. * The ASF licenses this file to You under the Apache License, Version 2.0 * (the "License"); you may not use this file except in compliance with @@ -14,14 +14,11 @@ * See the License for the specific language governing permissions and * limitations under the License. */ +/** @version $Revision: $*/ + /** - * @author Alexander V. Astapchuk - * @version $Revision: $ - */ - -/** * @file - * @brief Main decoding (disassembling) routines and structures. + * Main decoding (disassembling) routines and structures. * * @note Quick and rough implementation, subject for a change. */ @@ -50,32 +47,24 @@ //direct_addr = NULL; argc = 0; } - /** - * Mnemonic of the instruction.s - */ +/** Mnemonic of the instructions.*/ Mnemonic mn; - /** - * Size, in bytes, of the instruction. - */ +/** Size, in bytes, of the instruction.*/ unsigned size; - /** - * Flags of the instruction. - * @see MF_ - */ +/** Flags of the instruction. + * @see MF_ + */ unsigned flags; - /** - * An offset of target address, in case of 'CALL offset', - * 'JMP/Jcc offset'. - */ +/** + * An offset of target address, in case of 'CALL offset', 'JMP/Jcc offset'. + */ //int offset; - /** - * Direct address of the target (on Intel64/IA-32 is 'instruction IP' + - * 'instruction length' + offset). - */ +/** + * Direct address of the target (on Intel64/IA-32 is 'instruction IP' + + * 'instruction length' + offset). + */ //void * direct_addr; - /** - * Number of arguments of the instruction. - */ +/** Number of arguments of the instruction.*/ unsigned argc; // EncoderBase::Operand operands[3]; Index: src/encoder/ia32_em64t/enc_base.h =================================================================== --- src/encoder/ia32_em64t/enc_base.h (revision 525148) +++ src/encoder/ia32_em64t/enc_base.h (working copy) @@ -1,10 +1,10 @@ -/* +/** * Licensed to the Apache Software Foundation (ASF) under one or more - * contributor license agreements. See the NOTICE file distributed with + * contributor license agreements. See the NOTICE file distributed with * this work for additional information regarding copyright ownership. * The ASF licenses this file to You under the Apache License, Version 2.0 * (the "License"); you may not use this file except in compliance with - * the License. You may obtain a copy of the License at + * the License. You may obtain a copy of the License at * * http://www.apache.org/licenses/LICENSE-2.0 * @@ -14,16 +14,13 @@ * See the License for the specific language governing permissions and * limitations under the License. */ +/** @version $Revision: 1.1.2.3.4.4 $*/ + /** - * @author Alexander V. Astapchuk - * @version $Revision: 1.1.2.3.4.4 $ - */ - -/** * @file * @brief Main encoding routines and structures. */ - + #ifndef __ENC_BASE_H_INCLUDED__ #define __ENC_BASE_H_INCLUDED__ @@ -42,13 +39,13 @@ /** * @brief Basic facilities for generation of processor's instructions. * - * The class EncoderBase represents the basic facilities for the encoding of + * The class EncoderBase represents the basic facilities for the encoding of * processor's instructions on IA32 and EM64T platforms. * * The class provides general interface to generate the instructions as well - * as to retrieve some static data about instructions (number of arguments, + * as to retrieve some static data about instructions (number of arguments, * their roles, etc). - * + * * Currently, the EncoderBase class is used for both LIL and Jitrino code * generators. Each of these code generators has its own wrapper to adapt * this general interface for specific needs - see encoder.h for LIL wrappers @@ -63,67 +60,65 @@ public: class Operands; struct MnemonicDesc; - /** - * @brief Generates processor's instruction. - * - * @param stream - a buffer to generate into - * @param mn - \link Mnemonic mnemonic \endlink of the instruction - * @param opnds - operands for the instruction - * @returns (stream + length of the just generated instruction) - */ +/** + * @brief Generates processor's instruction. + * + * @param stream - a buffer to generate into + * @param mn - \link Mnemonic mnemonic \endlink of the instruction + * @param opnds - operands for the instruction + * @returns stream + length of the just generated instruction). + */ static char * encode(char * stream, Mnemonic mn, const Operands& opnds); - - /** - * @brief Generates the smallest possible number of NOP-s. - * - * Effectively generates the smallest possible number of instructions, - * which are NOP-s for CPU. Normally used to make a code alignment. - * - * The method inserts exactly number of bytes specified. It's a caller's - * responsibility to make sure the buffer is big enough. - * - * @param stream - buffer where to generate code into, can not be NULL - * @param howMany - how many bytes to fill with NOP-s - * @return \c (stream+howMany) - */ + +/** + * @brief Generates the smallest possible number of NOP-s. + * + * Effectively generates the smallest possible number of instructions, + * which are NOP-s for CPU. Normally used to make a code alignment. + * + * The method inserts exactly number of bytes specified. It's a caller's + * responsibility to make sure the buffer is big enough. + * + * @param stream - buffer where to generate code into, can not be NULL + * @param howMany - how many bytes to fill with NOP-s + * @return \c (stream+howMany) + */ static char * nops(char * stream, unsigned howMany); - /** - * @brief Inserts a prefix into the code buffer. - * - * The method writes no more than one byte into the buffer. This is a - * caller's responsibility to make sure the buffer is big enough. - * - * @param stream - buffer where to insert the prefix - * @param pref - prefix to be inserted. If it's InstPrefix_Null, then - * no action performed and return value is \c stream. - * @return \c (stream+1) if pref is not InstPrefix_Null, or \c stream - * otherwise - */ +/** + * @brief Inserts a prefix into the code buffer. + * + * The method writes no more than one byte into the buffer. This is a + * caller's responsibility to make sure the buffer is big enough. + * + * @param stream - buffer where to insert the prefix + * @param pref - prefix to be inserted. If it's InstPrefix_Null, then + * no action performed and return value is \c stream. + * @return \c (stream+1) if pref is not InstPrefix_Null, or \c stream + * otherwise. + */ static char * prefix(char* stream, InstPrefix pref); - /** - * @brief Returns #MnemonicDesc by the given Mnemonic. - */ +/** Returns #MnemonicDesc by the given Mnemonic.*/ static const MnemonicDesc * getMnemonicDesc(Mnemonic mn) { assert(mn < Mnemonic_Count); return mnemonics + mn; } - - /** - * @brief Returns a Mnemonic for the given name. - * - * The lookup is case insensitive, if no mnemonic found for the given - * string, then Mnemonic_Null returned. - */ + +/** + * @brief Returns a Mnemonic for the given name. + * + * The lookup is case insensitive, if no mnemonic found for the given + * string, then Mnemonic_Null returned. + */ static Mnemonic str2mnemonic(const char * mn_name); - - /** - * @brief Returns a string representation of the given Mnemonic. - * - * If invalid mnemonic passed, then the behavior is unpredictable. - */ + +/** + * Returns a string representation of the given Mnemonic. + * + * If invalid mnemonic passed, then the behavior is unpredictable. + */ static const char * getMnemonicString(Mnemonic mn) { return getMnemonicDesc(mn)->name; @@ -134,190 +129,154 @@ return getMnemonicDesc(mn)->name; } - - /** - * @brief Description of operand. - * - * Description of an operand in opcode - its kind, size or RegName if - * operand must be a particular register. - */ +/** + * @brief Description of operand. + * + * Description of an operand in opcode - its kind, size or RegName if + * operand must be a particular register. + */ struct OpndDesc { - /** - * @brief Location of the operand. - * - * May be a mask, i.e. OpndKind_Imm|OpndKind_Mem. - */ +/** + * @brief Location of the operand. + * + * May be a mask, i.e. OpndKind_Imm|OpndKind_Mem. + */ OpndKind kind; - /** - * @brief Size of the operand. - */ +/** @brief Size of the operand.*/ OpndSize size; - /** - * @brief Appropriate RegName if operand must reside on a particular - * register (i.e. CWD/CDQ instructions), RegName_Null - * otherwise. - */ +/** + * @brief Appropriate RegName if operand must reside on a particular + * register (i.e. CWD/CDQ instructions), RegName_Null otherwise. + */ RegName reg; }; - /** - * @brief Description of operands' roles in instruction. - */ +/** @brief Description of operands' roles in instruction.*/ struct OpndRolesDesc { - /** - * @brief Total number of operands in the operation. - */ +/** Total number of operands in the operation.*/ unsigned count; - /** - * @brief Number of defs in the operation. - */ +/** @brief Number of defs in the operation.*/ unsigned defCount; - /** - * @brief Number of uses in the operation. - */ +/** @brief Number of uses in the operation.*/ unsigned useCount; - /** - * @brief Operand roles, bit-packed. - * - * A bit-packed info about operands' roles. Each operand's role is - * described by two bits, counted from right-to-left - the less - * significant bits (0,1) represent operand#0. - * - * The mask is build by ORing #OpndRole_Def and #OpndRole_Use - * appropriately and shifting left, i.e. operand#0's role would be - * - '(OpndRole_Def|OpndRole_Use)' - * - opnd#1's role would be 'OpndRole_Use<<2' - * - and operand#2's role would be, say, 'OpndRole_Def<<4'. - */ +/** + * @brief Operand roles, bit-packed. + * + * A bit-packed info about operands' roles. Each operand's role is + * described by two bits, counted from right-to-left - the less + * significant bits (0,1) represent operand#0. + * + * The mask is build by ORing #OpndRole_Def and #OpndRole_Use + * appropriately and shifting left, i.e. operand#0's role would be + * - '(OpndRole_Def|OpndRole_Use)' + * - opnd#1's role would be 'OpndRole_Use<<2' + * - and operand#2's role would be, say, 'OpndRole_Def<<4'. + */ unsigned roles; }; - /** - * @brief Extracts appropriate OpndRole for a given operand. - * - * The order of operands is left-to-right, i.e. for MOV, it - * would be 'MOV op0, op1' - */ +/** + * @brief Extracts appropriate OpndRole for a given operand. + * + * The order of operands is left-to-right, i.e. for MOV, it + * would be 'MOV op0, op1' + */ static OpndRole getOpndRoles(OpndRolesDesc ord, unsigned idx) { assert(idx < ord.count); return (OpndRole)(ord.roles>>((ord.count-1-idx)*2) & 0x3); } - /** - * @brief Info about single opcode - its opcode bytes, operands, - * operands' roles. - */ +/** @brief Info about single opcode - its opcode bytes, operands, operands' roles.*/ struct OpcodeDesc { - /** - * @brief Raw opcode bytes. - * - * 'Raw' opcode bytes which do not require any analysis and are - * independent from arguments/sizes/etc (may include opcode size - * prefix). - */ +/** + * @brief Raw opcode bytes. + * + * 'Raw' opcode bytes which do not require any analysis and are + * independent from arguments/sizes/etc (may include opcode size + * prefix). + */ char opcode[5]; // 4 bytes unsigned opcode_len; // 4 unsigned aux0; // 4 unsigned aux1; // 4 - /** - * @brief Info about opcode's operands. - * - * The [3] mostly comes from IDIV/IMUL which both may have up to 3 - * operands. - */ +/** + * @brief Info about opcode's operands. + * + * The [3] mostly comes from IDIV/IMUL which both may have up to 3 + * operands. + */ OpndDesc opnds[3]; // 12*3 = 36 unsigned first_opnd; // 4 - /** - * @brief Info about operands - total number, number of uses/defs, - * operands' roles. - */ +/** @brief Info about operands - total number, number of uses/defs, operands' roles.*/ OpndRolesDesc roles; // 16 - /** - * @brief If not zero, then this is final OpcodeDesc structure in - * the list of opcodes for a given mnemonic. - */ +/** + * @brief If not zero, then this is final OpcodeDesc structure in the list of opcodes + * for a given mnemonic.*/ char last; // 1 // total: 74 - /** - * @brief Padding to make structure's size a power of 2. - */ +/** @brief Padding to make structure's size a power of 2.*/ char padding[128-74]; }; public: - /** - * @brief General info about mnemonic. - */ +/** @brief General info about mnemonic.*/ struct MnemonicDesc { - /** - * @brief The mnemonic itself. - */ +/** @brief The mnemonic itself.*/ Mnemonic mn; - /** - * Various characteristics of mnemonic. - * @see MF_ - */ +/** + * Various characteristics of mnemonic. + * + * @see MF_ + */ unsigned flags; - /** - * @brief Operation's operand's count and roles. - * - * For the operations whose opcodes may use different number of - * operands (i.e. IMUL/SHL) either most common value used, or empty - * value left. - */ +/** + * @brief Operation's operand's count and roles. + * + * For the operations whose opcodes may use different number of + * operands (i.e. IMUL/SHL) either most common value used, or empty + * value left. + */ OpndRolesDesc roles; - /** - * @brief Print name of the mnemonic. - */ +/** @brief Print name of the mnemonic.*/ const char * name; }; - - /** - * @brief Magic number, shows a maximum value a hash code can take. - * - * For meaning and arithmetics see enc_tabl.cpp. - * - * The value was increased from '5155' to '8192' to make it aligned - * for faster access in EncoderBase::lookup(). - */ +/** + * @brief Magic number, shows a maximum value a hash code can take. + * + * For meaning and arithmetics see enc_tabl.cpp. + * + * The value was increased from '5155' to '8192' to make it aligned + * for faster access in EncoderBase::lookup(). + */ static const unsigned int HASH_MAX = 8192; //5155; - /** - * @brief Empty value, used in hash-to-opcode map to show an empty slot. - */ +/** @brief Empty value, used in hash-to-opcode map to show an empty slot.*/ static const unsigned char NOHASH = 0xFF; - /** - * @brief The name says it all. - */ +/** @brief The name says it all.*/ static const unsigned char HASH_BITS_PER_OPERAND = 5; - /** - * @brief Contains info about a single instructions's operand - its - * location, size and a value for immediate or RegName for - * register operands. - */ +/** + * @brief Contains info about a single instructions's operand - its location, size + * and a value for immediate or RegName for register operands. + */ class Operand { public: - /** - * @brief Initializes the instance with empty size and kind. - */ +/** @brief Initializes the instance with empty size and kind.*/ Operand() : m_kind(OpndKind_Null), m_size(OpndSize_Null), m_need_rex(false) {} - /** - * @brief Creates register operand from given RegName. - */ +/** @brief Creates register operand from given RegName.*/ Operand(RegName reg) : m_kind(getRegKind(reg)), m_size(getRegSize(reg)), m_reg(reg) { hash_it(); } - /** - * @brief Creates register operand from given RegName and with the - * specified size and kind. - * - * Used to speedup Operand creation as there is no need to extract - * size and kind from the RegName. - * The provided size and kind must match the RegName's ones though. - */ +/** + * @brief Creates register operand from given RegName and with the + * specified size and kind. + * + * Used to speedup Operand creation as there is no need to extract + * size and kind from the RegName. + * The provided size and kind must match the RegName's ones though. + */ Operand(OpndSize sz, OpndKind kind, RegName reg) : m_kind(kind), m_size(sz), m_reg(reg) @@ -326,43 +285,33 @@ assert(m_kind == getRegKind(reg)); hash_it(); } - /** - * @brief Creates immediate operand with the given size and value. - */ +/** @brief Creates immediate operand with the given size and value.*/ Operand(OpndSize size, long long ival) : m_kind(OpndKind_Imm), m_size(size), m_imm64(ival) { hash_it(); } - /** - * @brief Creates immediate operand of OpndSize_32. - */ +/** @brief Creates immediate operand of OpndSize_32.*/ Operand(int ival) : m_kind(OpndKind_Imm), m_size(OpndSize_32), m_imm64(ival) { hash_it(); } - /** - * @brief Creates immediate operand of OpndSize_16. - */ +/** @brief Creates immediate operand of OpndSize_16.*/ Operand(short ival) : m_kind(OpndKind_Imm), m_size(OpndSize_16), m_imm64(ival) { hash_it(); } - /** - * @brief Creates immediate operand of OpndSize_8. - */ +/** @brief Creates immediate operand of OpndSize_8.*/ Operand(char ival) : m_kind(OpndKind_Imm), m_size(OpndSize_8), m_imm64(ival) { hash_it(); } - /** - * @brief Creates memory operand. - */ +/** @brief Creates memory operand.*/ Operand(OpndSize size, RegName base, RegName index, unsigned scale, int disp) : m_kind(OpndKind_Mem), m_size(size) { @@ -373,9 +322,7 @@ hash_it(); } - /** - * @brief Creates memory operand with only base and displacement. - */ +/** @brief Creates memory operand with only base and displacement.*/ Operand(OpndSize size, RegName base, int disp) : m_kind(OpndKind_Mem), m_size(size) { @@ -388,17 +335,11 @@ // // general info // - /** - * @brief Returns kind of the operand. - */ +/** @brief Returns kind of the operand.*/ OpndKind kind(void) const { return m_kind; } - /** - * @brief Returns size of the operand. - */ +/** @brief Returns size of the operand.*/ OpndSize size(void) const { return m_size; } - /** - * @brief Returns hash of the operand. - */ +/** @brief Returns hash of the operand.*/ unsigned hash(void) const { return m_hash; } // #ifdef _EM64T_ @@ -406,60 +347,33 @@ #else bool need_rex(void) const { return false; } #endif - /** - * @brief Tests whether operand is memory operand. - */ +/** @brief Tests whether operand is memory operand.*/ bool is_mem(void) const { return is_placed_in(OpndKind_Mem); } - /** - * @brief Tests whether operand is immediate operand. - */ +/** @brief Tests whether operand is immediate operand.*/ bool is_imm(void) const { return is_placed_in(OpndKind_Imm); } - /** - * @brief Tests whether operand is register operand. - */ +/** @brief Tests whether operand is register operand.*/ bool is_reg(void) const { return is_placed_in(OpndKind_Reg); } - /** - * @brief Tests whether operand is general-purpose register operand. - */ +/** @brief Tests whether operand is general-purpose register operand.*/ bool is_gpreg(void) const { return is_placed_in(OpndKind_GPReg); } - /** - * @brief Tests whether operand is float-point pseudo-register operand. - */ +/** @brief Tests whether operand is float-point pseudo-register operand.*/ bool is_fpreg(void) const { return is_placed_in(OpndKind_FPReg); } - /** - * @brief Tests whether operand is XMM register operand. - */ +/** @brief Tests whether operand is XMM register operand.*/ bool is_xmmreg(void) const { return is_placed_in(OpndKind_XMMReg); } #ifdef _HAVE_MMX_ - /** - * @brief Tests whether operand is MMX register operand. - */ +/** @brief Tests whether operand is MMX register operand.*/ bool is_mmxreg(void) const { return is_placed_in(OpndKind_MMXReg); } #endif - /** - * @brief Returns base of memory operand (RegName_Null if not memory). - */ +/** @brief Returns base of memory operand (RegName_Null if not memory).*/ RegName base(void) const { return is_mem() ? m_base : RegName_Null; } - /** - * @brief Returns index of memory operand (RegName_Null if not memory). - */ +/** @brief Returns index of memory operand (RegName_Null if not memory).*/ RegName index(void) const { return is_mem() ? m_index : RegName_Null; } - /** - * @brief Returns scale of memory operand (0 if not memory). - */ +/** @brief Returns scale of memory operand (0 if not memory).*/ unsigned scale(void) const { return is_mem() ? m_scale : 0; } - /** - * @brief Returns displacement of memory operand (0 if not memory). - */ +/** @brief Returns displacement of memory operand (0 if not memory). */ int disp(void) const { return is_mem() ? m_disp : 0; } - /** - * @brief Returns RegName of register operand (RegName_Null if not - * register). - */ +/** @brief Returns RegName of register operand (RegName_Null if not register).*/ RegName reg(void) const { return is_reg() ? m_reg : RegName_Null; } - /** - * @brief Returns value of immediate operand (0 if not immediate). - */ +/** @brief Returns value of immediate operand (0 if not immediate).*/ long long imm(void) const { return is_imm() ? m_imm64 : 0; } private: bool is_placed_in(OpndKind kd) const @@ -503,9 +417,7 @@ bool m_need_rex; friend class EncoderBase::Operands; }; - /** - * @brief Simple container for up to 3 Operand-s. - */ +/** @brief Simple container for up to 3 Operand-s.*/ class Operands { public: Operands(void) @@ -562,37 +474,31 @@ }; public: #ifdef _DEBUG - /** - * Verifies some presumptions about encoding data table. - * Called automagicaly during statics initialization. - */ +/** + * Verifies some presumptions about encoding data table. + * Called automagicaly during statics initialization. + */ static int verify(void); #endif private: - /** - * @brief Returns found OpcodeDesc by the given Mnemonic and operands. - */ +/** @brief Returns found OpcodeDesc by the given Mnemonic and operands.*/ static const OpcodeDesc * lookup(Mnemonic mn, const Operands& opnds); - /** - * @brief Encodes mod/rm byte. - */ +/** @brief Encodes mod/rm byte.*/ static char* encodeModRM(char* stream, const Operands& opnds, unsigned idx, const OpcodeDesc * odesc, Rex * prex); - /** - * @brief Encodes special things of opcode description - '/r', 'ib', etc. - */ +/** @brief Encodes special things of opcode description - '/r', 'ib', etc.*/ static char* encode_aux(char* stream, unsigned aux, const Operands& opnds, const OpcodeDesc * odesc, unsigned * pargsCount, Rex* prex); #ifdef _EM64T_ - /** - * @brief Returns true if the 'reg' argument represents one of the new - * EM64T registers - R8(D)-R15(D). - * - * The 64 bits versions of 'old-fashion' registers, i.e. RAX are not - * considered as 'extra'. - */ +/** + * @brief Returns TRUE if the 'reg' argument represents one of the new + * EM64T registers - R8(D)-R15(D). + * + * The 64 bits versions of 'old-fashion' registers, i.e. RAX are not + * considered as 'extra'. + */ static bool is_em64t_extra_reg(const RegName reg) { if (needs_rex_r(reg)) { @@ -625,14 +531,14 @@ } return false; } - /** - * @brief Returns an 'processor's index' of the register - the index - * used to encode the register in ModRM/SIB bytes. - * - * For the new EM64T registers the 'HW index' differs from the index - * encoded in RegName. For old-fashion registers it's effectively the - * same as ::getRegIndex(RegName). - */ +/** + * @brief Returns an 'processor's index' of the register - the index used to encode the + * register in ModRM/SIB bytes. + * + * For the new EM64T registers the 'HW index' differs from the index + * encoded in RegName. For old-fashion registers it's effectively the + * same as ::getRegIndex(RegName). + */ static unsigned char getHWRegIndex(const RegName reg) { if (getRegKind(reg) != OpndKind_GPReg) { @@ -658,49 +564,41 @@ } #endif public: - /** - * @brief A table used for the fast computation of hash value. - * - * A change must be strictly balanced with hash-related functions and data - * in enc_base.h/.cpp. - */ +/** + * @brief A table used for the fast computation of hash value. + * + * A change must be strictly balanced with hash-related functions and data + * in enc_base.h/.cpp. + */ static const unsigned char size_hash[OpndSize_64+1]; - /** - * @brief A table used for the fast computation of hash value. - * - * A change must be strictly balanced with hash-related functions and data - * in enc_base.h/.cpp. - */ +/** + * @brief A table used for the fast computation of hash value. + * + * A change must be strictly balanced with hash-related functions and data + * in enc_base.h/.cpp. + */ static const unsigned char kind_hash[OpndKind_Mem+1]; - /** - * @brief Maximum number of opcodes used for a single mnemonic. - * - * No arithmetics behind the number, simply estimated. - */ +/** + * @brief Maximum number of opcodes used for a single mnemonic. + * + * No arithmetics behind the number, simply estimated. + */ static const unsigned int MAX_OPCODES = 32; //20; - /** - * @brief Mapping between operands hash code and operands. - */ +/** @brief Mapping between operands hash code and operands.*/ static unsigned char opcodesHashMap[Mnemonic_Count][HASH_MAX]; - /** - * @brief Array of mnemonics. - */ +/** @brief Array of mnemonics.*/ static MnemonicDesc mnemonics[Mnemonic_Count]; - /** - * @brief Array of available opcodes. - */ +/** @brief Array of available opcodes.*/ static OpcodeDesc opcodes[Mnemonic_Count][MAX_OPCODES]; static int buildTable(void); static void buildMnemonicDesc(const MnemonicInfo * minfo); - /** - * @brief Computes hash value for the given operands. - */ +/** @brief Computes hash value for the given operands.*/ static unsigned short getHash(const OpcodeInfo* odesc); - /** - * @brief Dummy variable, for automatic invocation of buildTable() at - * startup. - */ +/** + * @brief Dummy variable, for automatic invocation of buildTable() at + * startup. + */ static int dummy; }; Index: src/encoder/ia32_em64t/enc_defs.h =================================================================== --- src/encoder/ia32_em64t/enc_defs.h (revision 525148) +++ src/encoder/ia32_em64t/enc_defs.h (working copy) @@ -1,10 +1,10 @@ -/* +/** * Licensed to the Apache Software Foundation (ASF) under one or more - * contributor license agreements. See the NOTICE file distributed with + * contributor license agreements. See the NOTICE file distributed with * this work for additional information regarding copyright ownership. * The ASF licenses this file to You under the Apache License, Version 2.0 * (the "License"); you may not use this file except in compliance with - * the License. You may obtain a copy of the License at + * the License. You may obtain a copy of the License at * * http://www.apache.org/licenses/LICENSE-2.0 * @@ -14,10 +14,7 @@ * See the License for the specific language governing permissions and * limitations under the License. */ -/** - * @author Alexander V. Astapchuk - * @version $Revision: 1.1.2.2.4.4 $ - */ +/** @version $Revision: 1.1.2.2.4.4 $*/ #ifndef _ENCODER_DEFS_H_ #define _ENCODER_DEFS_H_ @@ -35,24 +32,16 @@ #include #ifndef COUNTOF - /** - * Number of items in an array. - */ +/** Number of items in an array.*/ #define COUNTOF(a) (sizeof(a)/sizeof(a[0])) #endif #ifdef _EM64T_ - /** - * A stack pointer of default platform's size. - */ +/** A stack pointer of default platform's size.*/ #define REG_STACK RegName_RSP - /** - * A max GP register (with a highest index number) - */ +/** A max GP register (with a highest index number)*/ #define REG_MAX RegName_R15 - /** - * Total number of GP registers including stack pointer. - */ +/** Total number of GP registers including stack pointer.*/ #define MAX_REGS 15 #else #define REG_STACK RegName_ESP @@ -69,35 +58,31 @@ * Luckily, the long type serves as desired. */ typedef long int_ptr; -/** - * A number of bytes 'eaten' by an ordinary PUSH/POP. - */ +/** A number of bytes 'eaten' by an ordinary PUSH/POP.*/ #define STACK_SLOT_SIZE (sizeof(void*)) - -/** - * A recommended by Intel Arch Manual aligment for instructions that - * are targets for jmps. +/** A recommended by Intel Arch Manual aligment for instructions that are targets + * for jmps. */ #define JMP_TARGET_ALIGMENT (16) -/** - * A maximum possible size of native instruction. - */ +/** A maximum possible size of native instruction.*/ #define MAX_NATIVE_INST_SIZE (15) -/** +/** * The enum OpndKind describes an operand's location - memory, immediate or a register. * It can be used as a bit mask. */ enum OpndKind { - /** - * A change must be balanced with at least the following places: - * Ia32::Constraint-s use the OpndKind as a mask - * encoder.cpp & encoder_master_info.cpp uses OpndKind as an index for hashing - * - perhaps there are much more places - * - * NOTE: an MMXReg kind is incompatible with the current constraints framework, - * as it's not encoded as a mask. - */ +/** + * A change must be balanced with at least the following places: + *
        + *
      • Ia32::Constraint-s use the OpndKind as a mask
      • + *
      • encoder.cpp & encoder_master_info.cpp uses OpndKind as an index for hashing
      • + *
      • perhaps there are much more places
      • + *
      + * + * @note An MMXReg kind is incompatible with the current constraints framework, + * as it's not encoded as a mask. + */ OpndKind_Null=0, OpndKind_GPReg = 0x01, OpndKind_MinRegKind = OpndKind_GPReg, OpndKind_SReg = 0x02, @@ -127,13 +112,14 @@ enum OpndSize { - /** - * A change must be balanced with at least the following places: - * Ia32IRConstants.h :: getByteSize() uses some presumptions about OpndSize_ values - * Ia32::Constraint-s use the OpndSize as a mask - * encoder.cpp & encoder_master_info.cpp uses OpndSize as an index for hashing - * - perhaps there are much more places - */ +/** + * A change must be balanced with at least the following places: + *
        + *
      • Ia32IRConstants.h :: getByteSize() uses some presumptions about OpndSize_ values
      • + *
      • Ia32::Constraint-s use the OpndSize as a mask
      • + *
      • encoder.cpp & encoder_master_info.cpp uses OpndSize as an index for hashing
      • + *
      • perhaps there are much more places
      • + */ OpndSize_Null = 0, OpndSize_8 = 0x01, OpndSize_16 = 0x02, @@ -148,7 +134,7 @@ OpndSize_Default = OpndSize_Any }; -/** +/** * enum OpndRole defines the role of an operand in an instruction * Can be used as mask to combine def and use. The complete def+use * info can be combined in 2 bits which is used, say in Encoder::OpndRole. @@ -170,13 +156,13 @@ RegName_Null = 0, #ifdef _EM64T_ - /* - An index part of the RegName-s for RAX-RDI, EAX-ESI, AX-SI and AL-BH is - the same as the index used during instructions encoding. The same rule - applies for XMM regsters for IA32. - For new EM64T registers (both GP and XMM) the index need to be corrected to - obtain the index used in processor's instructions. - */ +/** + * An index part of the RegName-s for RAX-RDI, EAX-ESI, AX-SI and AL-BH is + * the same as the index used during instructions encoding. The same rule + * applies for XMM regsters for IA32. + * For new EM64T registers (both GP and XMM) the index need to be corrected to + * obtain the index used in processor's instructions. + */ RegName_RAX = REGNAME(OpndKind_GPReg,OpndSize_64,0), RegName_RCX = REGNAME(OpndKind_GPReg,OpndSize_64,1), RegName_RDX = REGNAME(OpndKind_GPReg,OpndSize_64,2), @@ -402,18 +388,18 @@ enum Mnemonic { Mnemonic_NULL=0, Mnemonic_Null=Mnemonic_NULL, -Mnemonic_ADC, // Add with Carry -Mnemonic_ADD, // Add -Mnemonic_ADDSD, // Add Scalar Double-Precision Floating-Point Values -Mnemonic_ADDSS, // Add Scalar Single-Precision Floating-Point Values -Mnemonic_AND, // Logical AND +Mnemonic_ADC, /** Add with Carry*/ +Mnemonic_ADD, /** Add*/ +Mnemonic_ADDSD, /** Add Scalar Double-Precision Floating-Point Values*/ +Mnemonic_ADDSS, /** Add Scalar Single-Precision Floating-Point Values*/ +Mnemonic_AND, /** Logical AND*/ -Mnemonic_BSF, // Bit scan forward -Mnemonic_BSR, // Bit scan reverse +Mnemonic_BSF, /** Bit scan forward*/ +Mnemonic_BSR, /** Bit scan reverse*/ -Mnemonic_CALL, // Call Procedure -Mnemonic_CWD, Mnemonic_CDQ=Mnemonic_CWD,// Convert Word to Doubleword/Convert Doubleword to Qua T dword -Mnemonic_CMOVcc, // Conditional Move +Mnemonic_CALL, /** Call Procedure*/ +Mnemonic_CWD, Mnemonic_CDQ=Mnemonic_CWD,/** Convert Word to Doubleword/Convert Doubleword to Qua T dword*/ +Mnemonic_CMOVcc, /** Conditional Move*/ CCM(CMOV,O), CCM(CMOV,NO), CCM(CMOV,B), CCM(CMOV,NAE), CCM(CMOV,C), @@ -432,69 +418,69 @@ CCM(CMOV,LE), CCM(CMOV,NG), CCM(CMOV,NLE), CCM(CMOV,G), -Mnemonic_CMP, // Compare Two Operands -Mnemonic_CMPXCHG, // Compare and exchange +Mnemonic_CMP, /** Compare Two Operands*/ +Mnemonic_CMPXCHG, /** Compare and exchange*/ // // double -> float -Mnemonic_CVTSD2SS, // Convert Scalar Double-Precision Floating-Point Value to Scalar Single-Precision Floating-Point Value +Mnemonic_CVTSD2SS, /** Convert Scalar Double-Precision Floating-Point Value to Scalar Single-Precision Floating-Point Value*/ // double -> int32 -Mnemonic_CVTSD2SI, // Convert Scalar Double-Precision Floating-Point Value to Doubleword Integer +Mnemonic_CVTSD2SI, /** Convert Scalar Double-Precision Floating-Point Value to Doubleword Integer*/ // double [truncated] -> int32 -Mnemonic_CVTTSD2SI, // Convert with Truncation Scalar Double-Precision Floating-Point Value to Signed Doubleword Integer +Mnemonic_CVTTSD2SI, /** Convert with Truncation Scalar Double-Precision Floating-Point Value to Signed Doubleword Integer*/ // // float -> double -Mnemonic_CVTSS2SD, // Convert Scalar Single-Precision Floating-Point Value to Scalar Double-Precision Floating-Point Value +Mnemonic_CVTSS2SD, /** Convert Scalar Single-Precision Floating-Point Value to Scalar Double-Precision Floating-Point Value*/ // float -> int32 -Mnemonic_CVTSS2SI, // Convert Scalar Single-Precision Floating-Point Value to Doubleword Integer +Mnemonic_CVTSS2SI, /** Convert Scalar Single-Precision Floating-Point Value to Doubleword Integer*/ // float [truncated] -> int32 -Mnemonic_CVTTSS2SI, // Convert with Truncation Scalar Single-Precision Floating-Point Value to Doubleword Integer +Mnemonic_CVTTSS2SI, /** Convert with Truncation Scalar Single-Precision Floating-Point Value to Doubleword Integer*/ // // int32 -> double -Mnemonic_CVTSI2SD, // Convert Doubleword Integer to Scalar Double-Precision Floating-Point Value +Mnemonic_CVTSI2SD, /** Convert Doubleword Integer to Scalar Double-Precision Floating-Point Value*/ // int32 -> float -Mnemonic_CVTSI2SS, // Convert Doubleword Integer to Scalar Single-Precision Floating-Point Value +Mnemonic_CVTSI2SS, /** Convert Doubleword Integer to Scalar Single-Precision Floating-Point Value*/ -//Mnemonic_CMPXCHG, // Compare and Exchange -//Mnemonic_CMPXCHG8B, // Compare and Exchange 8 Bytes -Mnemonic_COMISD, // Compare Scalar Ordered Double-Precision Floating-Point Values and Set EFLAGS -Mnemonic_COMISS, // Compare Scalar Ordered Single-Precision Floating-Point Values and Set EFLAGS -Mnemonic_DEC, // Decrement by 1 -//Mnemonic_DIV, // Unsigned Divide -Mnemonic_DIVSD, // Divide Scalar Double-Precision Floating-Point Values -Mnemonic_DIVSS, // Divide Scalar Single-Precision Floating-Point Values +//Mnemonic_CMPXCHG, /** Compare and Exchange*/ +//Mnemonic_CMPXCHG8B, /** Compare and Exchange 8 Bytes*/ +Mnemonic_COMISD, /** Compare Scalar Ordered Double-Precision Floating-Point Values and Set EFLAGS*/ +Mnemonic_COMISS, /** Compare Scalar Ordered Single-Precision Floating-Point Values and Set EFLAGS*/ +Mnemonic_DEC, /** Decrement by 1*/ +//Mnemonic_DIV, /** Unsigned Divide*/ +Mnemonic_DIVSD, /** Divide Scalar Double-Precision Floating-Point Values*/ +Mnemonic_DIVSS, /** Divide Scalar Single-Precision Floating-Point Values*/ +*/ - #ifdef _HAVE_MMX_ -Mnemonic_EMMS, // Empty MMX Technology State +Mnemonic_EMMS, /** Empty MMX Technology State*/ #endif -Mnemonic_FLDCW, // Load FPU control word -Mnemonic_FNSTCW, // Store FPU control word -Mnemonic_FSTSW, // Store FPU status word -//Mnemonic_FDECSTP, // Decrement Stack-Top Pointer -Mnemonic_FILD, // Load Integer -Mnemonic_FLD, // Load Floating Point Value -Mnemonic_FCLEX, // Clear Exceptions -Mnemonic_FCHS, // Change sign of ST0 -Mnemonic_FNCLEX, // Clear Exceptions +Mnemonic_FLDCW, /** Load FPU control word*/ +Mnemonic_FNSTCW, /** Store FPU control word*/ +Mnemonic_FSTSW, /** Store FPU status word*/*/ +//Mnemonic_FDECSTP, /** Decrement Stack-Top Pointer +Mnemonic_FILD, /** Load Integer*/ +Mnemonic_FLD, /** Load Floating Point Value*/ +Mnemonic_FCLEX, /** Clear Exceptions*/ +Mnemonic_FCHS, /** Change sign of ST0*/ +Mnemonic_FNCLEX, /** Clear Exceptions*/ -//Mnemonic_FINCSTP, // Increment Stack-Top Pointer -Mnemonic_FIST, // Store Integer -Mnemonic_FISTP, // Store Integer, pop FPU stack -Mnemonic_FISTTP, // Store Integer with Truncation -Mnemonic_FPREM, // Partial Remainder -Mnemonic_FPREM1, // Partial Remainder -Mnemonic_FST, // Store Floating Point Value -Mnemonic_FSTP, // Store Floating Point Value and pop the FP stack +//Mnemonic_FINCSTP, /** Increment Stack-Top Pointer*/ +Mnemonic_FIST, /** Store Integer*/ +Mnemonic_FISTP, /** Store Integer, pop FPU stack*/ +Mnemonic_FISTTP, /** Store Integer with Truncation*/ +Mnemonic_FPREM, /** Partial Remainder*/ +Mnemonic_FPREM1, /** Partial Remainder*/ +Mnemonic_FST, /** Store Floating Point Value*/ +Mnemonic_FSTP, /** Store Floating Point Value and pop the FP stack*/ Mnemonic_XCHG, -Mnemonic_DIV, // Unsigned Divide -Mnemonic_IDIV, // Signed Divide -Mnemonic_MUL, // Unsigned Multiply -Mnemonic_IMUL, // Signed Multiply -Mnemonic_INC, // Increment by 1 -Mnemonic_INT3, // Call break point -Mnemonic_Jcc, // Jump if Condition Is Met +Mnemonic_DIV, /** Unsigned Divide*/ +Mnemonic_IDIV, /** Signed Divide*/ +Mnemonic_MUL, /** Unsigned Multiply*/ +Mnemonic_IMUL, /** Signed Multiply*/ +Mnemonic_INC, /** Increment by 1*/ +Mnemonic_INT3, /** Call break point*/ +Mnemonic_Jcc, /** Jump if Condition Is Met*/ CCM(J,O), CCM(J,NO), CCM(J,B), CCM(J,NAE), CCM(J,C), @@ -511,46 +497,46 @@ CCM(J,NL), CCM(J,GE), CCM(J,LE), CCM(J,NG), CCM(J,NLE), CCM(J,G), -Mnemonic_JMP, // Jump -Mnemonic_LEA, // Load Effective Address -Mnemonic_LOOP, // Loop according to ECX counter -Mnemonic_LOOPE, // Loop according to ECX counter -Mnemonic_LOOPNE, Mnemonic_LOOPNZ = Mnemonic_LOOPNE, // Loop according to ECX -Mnemonic_LAHF, // Load Flags into AH -Mnemonic_MOV, // Move -Mnemonic_MOVD, // Move Double word -Mnemonic_MOVQ, // Move Quadword -/*Mnemonic_MOVS, // Move Data from String to String*/ +Mnemonic_JMP, /** Jump*/ +Mnemonic_LEA, /** Load Effective Address*/ +Mnemonic_LOOP, /** Loop according to ECX counter*/ +Mnemonic_LOOPE, /** Loop according to ECX counter*/ +Mnemonic_LOOPNE, Mnemonic_LOOPNZ = Mnemonic_LOOPNE, /** Loop according to ECX */ +Mnemonic_LAHF, /** Load Flags into AH*/ +Mnemonic_MOV, /** Move*/ +Mnemonic_MOVD, /** Move Double word*/ +Mnemonic_MOVQ, /** Move Quadword*/ +Mnemonic_MOVS, /** Move Data from String to String*/ // MOVS is a special case: see encodign table for more details, Mnemonic_MOVS8, Mnemonic_MOVS16, Mnemonic_MOVS32, // -Mnemonic_MOVSD, // Move Scalar Double-Precision Floating-Point Value -Mnemonic_MOVSS, // Move Scalar Single-Precision Floating-Point Values -Mnemonic_MOVSX, // Move with Sign-Extension -Mnemonic_MOVZX, // Move with Zero-Extend -//Mnemonic_MUL, // Unsigned Multiply -Mnemonic_MULSD, // Multiply Scalar Double-Precision Floating-Point Values -Mnemonic_MULSS, // Multiply Scalar Single-Precision Floating-Point Values -Mnemonic_NEG, // Two's Complement Negation -Mnemonic_NOP, // No Operation -Mnemonic_NOT, // One's Complement Negation -Mnemonic_OR, // Logical Inclusive OR +Mnemonic_MOVSD, /** Move Scalar Double-Precision Floating-Point Value*/ +Mnemonic_MOVSS, /** Move Scalar Single-Precision Floating-Point Values*/ +Mnemonic_MOVSX, /** Move with Sign-Extension*/ +Mnemonic_MOVZX, /** Move with Zero-Extend*/ +Mnemonic_MUL, /** Unsigned Multiply*/ +Mnemonic_MULSD, /** Multiply Scalar Double-Precision Floating-Point Values*/ +Mnemonic_MULSS, /** Multiply Scalar Single-Precision Floating-Point Values*/ +Mnemonic_NEG, /** Two's Complement Negation*/ +Mnemonic_NOP, /** No Operation*/ +Mnemonic_NOT, /** One's Complement Negation*/ +Mnemonic_OR, /** Logical Inclusive OR*/ #ifdef _HAVE_MMX_ - Mnemonic_PADDQ, // Add Packed Quadword Integers - Mnemonic_PAND, // Logical AND - Mnemonic_POR, // Bitwise Logical OR - Mnemonic_PSUBQ, // Subtract Packed Quadword Integers + Mnemonic_PADDQ, /** Add Packed Quadword Integers*/ + Mnemonic_PAND, /** Logical AND*/ + Mnemonic_POR, /** Bitwise Logical OR*/ + Mnemonic_PSUBQ, /** Subtract Packed Quadword Integers*/ #endif -Mnemonic_PXOR, // Logical Exclusive OR -Mnemonic_POP, // Pop a Value from the Stack -Mnemonic_POPFD, // Pop a Value of EFLAGS register from the Stack -Mnemonic_PUSH, // Push Word or Doubleword Onto the Stack -Mnemonic_PUSHFD, // Push EFLAGS Doubleword Onto the Stack -Mnemonic_RET, // Return from Procedure +Mnemonic_PXOR, /** Logical Exclusive OR*/ +Mnemonic_POP, /** Pop a Value from the Stack*/ +Mnemonic_POPFD, /** Pop a Value of EFLAGS register from the Stack*/ +Mnemonic_PUSH, /** Push Word or Doubleword Onto the Stack*/ +Mnemonic_PUSHFD, /** Push EFLAGS Doubleword Onto the Stack*/ +Mnemonic_RET, /** Return from Procedure*/ -Mnemonic_SETcc, // Set Byte on Condition +Mnemonic_SETcc, /** Set Byte on Condition*/ CCM(SET,O), CCM(SET,NO), CCM(SET,B), CCM(SET,NAE), CCM(SET,C), @@ -568,57 +554,59 @@ CCM(SET,LE), CCM(SET,NG), CCM(SET,NLE), CCM(SET,G), -Mnemonic_SAL, Mnemonic_SHL=Mnemonic_SAL,// Shift left -Mnemonic_SAR, // Unsigned shift right -Mnemonic_ROR, // Rotate right -Mnemonic_RCR, // Rotate right through CARRY flag -Mnemonic_ROL, // Rotate left -Mnemonic_RCL, // Rotate left through CARRY flag -Mnemonic_SHR, // Signed shift right -Mnemonic_SHRD, // Double Precision Shift Right -Mnemonic_SHLD, // Double Precision Shift Left +Mnemonic_SAL, Mnemonic_SHL=Mnemonic_SAL,/** Shift left*/ +Mnemonic_SAR, /** Unsigned shift right*/ +Mnemonic_ROR, /** Rotate right*/ +Mnemonic_RCR, /** Rotate right through CARRY flag*/ +Mnemonic_ROL, /** Rotate left*/ +Mnemonic_RCL, /** Rotate left through CARRY flag*/ +Mnemonic_SHR, /** Signed shift right*/ +Mnemonic_SHRD, /** Double Precision Shift Right*/ +Mnemonic_SHLD, /** Double Precision Shift Left*/ -Mnemonic_SBB, // Integer Subtraction with Borrow -Mnemonic_SUB, // Subtract -Mnemonic_SUBSD, // Subtract Scalar Double-Precision Floating-Point Values -Mnemonic_SUBSS, // Subtract Scalar Single-Precision Floating-Point Values +Mnemonic_SBB, /** Integer Subtraction with Borrow*/ +Mnemonic_SUB, /** Subtract*/ +Mnemonic_SUBSD, /** Subtract Scalar Double-Precision Floating-Point Values*/ +Mnemonic_SUBSS, /** Subtract Scalar Single-Precision Floating-Point Values*/ -Mnemonic_TEST, // Logical Compare +Mnemonic_TEST, /** Logical Compare*/ -Mnemonic_UCOMISD, // Unordered Compare Scalar Double-Precision Floating-Point Values and Set EFLAGS -Mnemonic_UCOMISS, // Unordered Compare Scalar Single-Precision Floating-Point Values and Set EFLAGS +Mnemonic_UCOMISD, /** Unordered Compare Scalar Double-Precision Floating-Point Values and Set EFLAGS*/ +Mnemonic_UCOMISS, /** Unordered Compare Scalar Single-Precision Floating-Point Values and Set EFLAGS*/ -Mnemonic_XOR, // Logical Exclusive OR -// -// packed things, -// -Mnemonic_XORPD, // Bitwise Logical XOR for Double-Precision Floating-Point Values -Mnemonic_XORPS, // Bitwise Logical XOR for Single-Precision Floating-Point Values +Mnemonic_XOR, /** Logical Exclusive OR*/ +/** + *@name Packed Things + * @{ + */ +Mnemonic_XORPD, /** Bitwise Logical XOR for Double-Precision Floating-Point Values*/ +Mnemonic_XORPS, /** Bitwise Logical XOR for Single-Precision Floating-Point Values*/ -Mnemonic_CVTDQ2PD, // Convert Packed Doubleword Integers to Packed Double-Precision Floating-Point Values -Mnemonic_CVTTPD2DQ, // Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Doubleword Integers +Mnemonic_CVTDQ2PD, /** Convert Packed Doubleword Integers to Packed Double-Precision Floating-Point Values*/ +Mnemonic_CVTTPD2DQ, /** Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Doubleword Integers*/ -Mnemonic_CVTDQ2PS, // Convert Packed Doubleword Integers to Packed Single-Precision Floating-Point Values -Mnemonic_CVTTPS2DQ, // Convert with Truncation Packed Single-Precision Floating-Point Values to Packed Doubleword Integers -// -// String operations -// -Mnemonic_STD, // Set direction flag -Mnemonic_CLD, // Clear direction flag -Mnemonic_SCAS, // Scan string -Mnemonic_STOS, // Store string +Mnemonic_CVTDQ2PS, /** Convert Packed Doubleword Integers to Packed Single-Precision Floating-Point Values*/ +Mnemonic_CVTTPS2DQ, /** Convert with Truncation Packed Single-Precision Floating-Point Values to Packed Doubleword Integers*/ +/** @}*/ +/** + * @name String Operations + * @{ + */ +Mnemonic_STD, /** Set direction flag*/ +Mnemonic_CLD, /** Clear direction flag*/ +Mnemonic_SCAS, /** Scan string*/ +Mnemonic_STOS, /** Store string*/ + // -Mnemonic_WAIT, // Check pending pending unmasked floating-point exception +Mnemonic_WAIT, /** Check pending pending unmasked floating-point exception*/ // Mnemonic_Count }; - +/** @}*/ #undef CCM -/** - * @brief Instruction prefixes, according to arch manual. - */ +/** Instruction prefixes, according to arch manual.*/ enum InstPrefix { InstPrefix_Null = 0, // Group 1 @@ -658,16 +646,15 @@ } /** - * @brief Returns #RegName for a given name. + * Returns #RegName for a given name. * * Name is case-insensitive. + * * @param regname - string name of a register * @return #RegName for the given name, or #RegName_Null if name is invalid */ RegName getRegName(const char * regname); -/** - * Constructs RegName from the given OpndKind, size and index. - */ +/** Constructs RegName from the given OpndKind, size and index.*/ inline RegName getRegName(OpndKind k, OpndSize s, int idx) { return (RegName)REGNAME(k,s,idx); @@ -680,22 +667,18 @@ return 1<<(reg&0xff); } /** - * @brief Extracts #RegKind from the #RegName. + * Extracts #RegKind from the #RegName. */ inline OpndKind getRegKind(RegName reg) { return (OpndKind)(reg>>24); } -/** - * @brief Extracts #OpndSize from #RegName. - */ +/** Extracts #OpndSize from #RegName.*/ inline OpndSize getRegSize(RegName reg) { return (OpndSize)((reg>>16)&0xFF); } -/** - * Extracts an index from the given RegName. - */ +/** Extracts an index from the given RegName.*/ inline unsigned char getRegIndex(RegName reg) { return (unsigned char)(reg&0xFF); @@ -744,7 +727,7 @@ } /** - * brief Tests two RegName-s of the same kind for equality. + * Tests two RegName-s of the same kind for equality. * * @note Does work for 8 bit general purpose registers (AH, AL, BH, BL, etc). */ Index: src/encoder/ia32_em64t/enc_prvt.h =================================================================== --- src/encoder/ia32_em64t/enc_prvt.h (revision 525148) +++ src/encoder/ia32_em64t/enc_prvt.h (working copy) @@ -1,10 +1,10 @@ -/* +/** * Licensed to the Apache Software Foundation (ASF) under one or more - * contributor license agreements. See the NOTICE file distributed with + * contributor license agreements. See the NOTICE file distributed with * this work for additional information regarding copyright ownership. * The ASF licenses this file to You under the Apache License, Version 2.0 * (the "License"); you may not use this file except in compliance with - * the License. You may obtain a copy of the License at + * the License. You may obtain a copy of the License at * * http://www.apache.org/licenses/LICENSE-2.0 * @@ -14,22 +14,19 @@ * See the License for the specific language governing permissions and * limitations under the License. */ -/** - * @author Alexander V. Astapchuk - * @version $Revision: 1.1.2.2.4.4 $ - */ +/** @version $Revision: 1.1.2.2.4.4 $*/ #ifndef __ENC_PRVT_H_INCLUDED__ #define __ENC_PRVT_H_INCLUDED__ #include "enc_base.h" ENCODER_NAMESPACE_START -/* +/** * @file * @brief Contains some definitions/constants and other stuff used by the - * Encoder internally. + * Encoder internally. */ - + enum OpcodeByteKind { //OpcodeByteKind_Opcode = 0x0000, OpcodeByteKind_ZeroOpcodeByte = 0x0100, @@ -62,27 +59,23 @@ OpcodeByteKind_REX_W = 0x1300, #endif OpcodeByteKind_plus_i = 0x1400, - /** - * a special marker, means 'no opcode on the given position' - * used in opcodes array, to specify the empty slot, say - * to fill an em64t-specific opcode on ia32. - * last 'e' made lowercase to avoid a mess with 'F' in - * OpcodeByteKind_LAST . - */ +/** + * A special marker, means 'no opcode on the given position' + * used in opcodes array, to specify the empty slot, say + * to fill an em64t-specific opcode on ia32. + * last 'e' made lowercase to avoid a mess with 'F' in + * OpcodeByteKind_LAST . + */ OpcodeByteKind_EMPTY = 0xFFFE, - /** - * a special marker, means 'no more opcodes in the array' - * used in in opcodes array to show that there are no more - * opcodes in the array for a given mnemonic. - */ +/** + * A special marker, means 'no more opcodes in the array' + * used in in opcodes array to show that there are no more + * opcodes in the array for a given mnemonic. + */ OpcodeByteKind_LAST = 0xFFFF, - /** - * a mask to extract the OpcodeByteKind - */ +/** A mask to extract the OpcodeByteKind*/ OpcodeByteKind_KindMask = 0xFF00, - /** - * a mask to extract the opcode byte when presented - */ +/** A mask to extract the opcode byte when presented*/ OpcodeByteKind_OpcodeMask = 0x00FF }; @@ -213,9 +206,7 @@ #endif -/** - * @brief Represents the REX part of instruction. - */ +/** @brief Represents the REX part of instruction.*/ struct Rex { unsigned char b : 1; unsigned char x : 1; @@ -225,18 +216,14 @@ unsigned int :24; }; -/** - * @brief Describes SIB (scale,index,base) byte. - */ +/** @brief Describes SIB (scale,index,base) byte.*/ struct SIB { unsigned char base:3; unsigned char index:3; unsigned char scale:2; unsigned int padding:24; }; -/** - * @brief Describes ModRM byte. - */ +/** @brief Describes ModRM byte.*/ struct ModRM { unsigned char rm:3; @@ -245,12 +232,10 @@ unsigned int padding:24; }; - - /** -* exactly the same as EncoderBase::OpcodeDesc, but also holds info about -* platform on which the opcode is applicable. -*/ + * Exactly the same as EncoderBase::OpcodeDesc, but also holds info about + * platform on which the opcode is applicable. + */ struct OpcodeInfo { enum platform { all, em64t, ia32 }; platform platf; @@ -261,30 +246,20 @@ /** * @defgroup MF_ Mnemonic flags -*/ + */ - /** - * Operation has no special properties. - */ +/** Operation has no special properties.*/ #define MF_NONE (0x00000000) - /** - * Operation affects flags - */ +/** Operation affects flags*/ #define MF_AFFECTS_FLAGS (0x00000001) - /** - * Operation uses flags - conditional operations, ADC/SBB/ETC - */ +/** Operation uses flags - conditional operations, ADC/SBB/ETC*/ #define MF_USES_FLAGS (0x00000002) - /** - * Operation is conditional - MOVcc/SETcc/Jcc/ETC - */ +/** Operation is conditional - MOVcc/SETcc/Jcc/ETC*/ #define MF_CONDITIONAL (0x00000004) -/** - * Operation is symmetric - its args can be swapped (ADD/MUL/etc). - */ +/** Operation is symmetric - its args can be swapped (ADD/MUL/etc).*/ #define MF_SYMMETRIC (0x00000008) /** - * Operation is XOR-like - XOR, SUB - operations of 'arg,arg' is pure def, + * Operation is XOR-like - XOR, SUB - operations of 'arg,arg' is pure def, * without use. */ #define MF_SAME_ARG_NO_USE (0x00000010) @@ -292,39 +267,35 @@ ///@} // ~MNF /** - * @see same structure as EncoderBase::MnemonicDesc, but carries + * @sa The same structure as EncoderBase::MnemonicDesc, but carries * MnemonicInfo::OpcodeInfo[] instead of OpcodeDesc[]. * Only used during prebuilding the encoding tables, thus it's hidden under * the appropriate define. */ struct MnemonicInfo { - /** - * The mnemonic itself - */ +/** The mnemonic itself*/ Mnemonic mn; - /** - * Various characteristics of mnemonic. - * @see MF_ - */ +/** + * Various characteristics of mnemonic. + * @sa MF_ + */ unsigned flags; - /** - * Number of args/des/uses/roles for the operation. For the operations - * which may use different number of operands (i.e. IMUL/SHL) use the - * most common value, or leave '0' if you are sure this info is not - * required. - */ +/** + * Number of args/des/uses/roles for the operation. For the operations + * which may use different number of operands (i.e. IMUL/SHL) use the + * most common value, or leave '0' if you are sure this info is not + * required. + */ EncoderBase::OpndRolesDesc roles; - /** - * Print name of the mnemonic - */ +/** Print name of the mnemonic*/ const char * name; - /** - * Array of opcodes. - * The terminating opcode description always have OpcodeByteKind_LAST - * at the opcodes[i].opcode[0]. - * The size of '20' has nothing behind it, just counted the max - * number of opcodes currently used. - */ +/** + * Array of opcodes. + * The terminating opcode description always have OpcodeByteKind_LAST + * at the opcodes[i].opcode[0]. + * The size of '20' has nothing behind it, just counted the max + * number of opcodes currently used. + */ OpcodeInfo opcodes[20]; }; Index: src/encoder/ia32_em64t/encoder.h =================================================================== --- src/encoder/ia32_em64t/encoder.h (revision 525148) +++ src/encoder/ia32_em64t/encoder.h (working copy) @@ -1,10 +1,10 @@ -/* +/** * Licensed to the Apache Software Foundation (ASF) under one or more - * contributor license agreements. See the NOTICE file distributed with + * contributor license agreements. See the NOTICE file distributed with * this work for additional information regarding copyright ownership. * The ASF licenses this file to You under the Apache License, Version 2.0 * (the "License"); you may not use this file except in compliance with - * the License. You may obtain a copy of the License at + * the License. You may obtain a copy of the License at * * http://www.apache.org/licenses/LICENSE-2.0 * @@ -14,11 +14,8 @@ * See the License for the specific language governing permissions and * limitations under the License. */ +/** @version $Revision: 1.1.2.2.4.5 $*/ /** - * @author Alexander V. Astapchuk - * @version $Revision: 1.1.2.2.4.5 $ - */ -/** * @file * @brief Simple interface for generating processor instructions. * @@ -42,36 +39,36 @@ #include "open/types.h" #ifdef _EM64T_ -// size of general-purpose value on the stack in bytes +/** Size of general-purpose value on the stack in bytes.*/ #define GR_STACK_SIZE 8 -// size of floating-point value on the stack in bytes +/** size of floating-point value on the stack in bytes.*/ #define FR_STACK_SIZE 8 #if defined(WIN32) || defined(_WIN64) - // maximum number of GP registers for inputs +/** Maximum number of GP registers for inputs.*/ const int MAX_GR = 4; - // maximum number of FP registers for inputs +/** Maximum number of FP registers for inputs.*/ const int MAX_FR = 4; - // WIN64 reserves 4 words for shadow space +/** WIN64 reserves 4 words for shadow space.*/ const int SHADOW = 4 * GR_STACK_SIZE; #else - // maximum number of GP registers for inputs +/** Maximum number of GP registers for inputs.*/ const int MAX_GR = 6; - // maximum number of FP registers for inputs +/** Maximum number of FP registers for inputs.*/ const int MAX_FR = 8; - // Linux x64 doesn't reserve shadow space +/** Linux x64 doesn't reserve shadow space.*/ const int SHADOW = 0; #endif #else -// size of general-purpose value on the stack in bytes +/** Size of general-purpose value on the stack in bytes.*/ #define GR_STACK_SIZE 4 -// size of general-purpose value on the stack in bytes +/** Size of general-purpose value on the stack in bytes.*/ #define FR_STACK_SIZE 8 -// maximum number of GP registers for inputs +/** Maximum number of GP registers for inputs.*/ const int MAX_GR = 0; -// maximum number of FP registers for inputs +/** Maximum number of FP registers for inputs.*/ const int MAX_FR = 0; #endif @@ -94,7 +91,7 @@ xmm4_reg, xmm5_reg, xmm6_reg, xmm7_reg, fs_reg, #endif - /** @brief Total number of registers.*/ +/** Total number of registers.*/ n_reg }; // @@ -113,18 +110,15 @@ #endif }; -// -// opcodes for alu instructions -// +/** Opcodes for alu instructions.*/ enum ALU_Opcode { add_opc = 0,or_opc, adc_opc, sbb_opc, and_opc, sub_opc, xor_opc, cmp_opc, n_alu }; -// -// opcodes for shift instructions -// +/** Opcodes for shift instructions.*/ + enum Shift_Opcode { shld_opc, shrd_opc, shl_opc, shr_opc, sar_opc, ror_opc, max_shift_opcode=6, n_shift = 6 @@ -209,7 +203,7 @@ void operator delete(void *, void *) {} private: - // disallow copying +// disallow copying Opnd(const Opnd &): tag(Mem) { assert(false); } Opnd& operator=(const Opnd &) { assert(false); return *this; } }; @@ -299,7 +293,7 @@ RM_Opnd(Tag t): Opnd(t) {} private: - // disallow copying +// disallow copying RM_Opnd(const RM_Opnd &): Opnd(Reg) { assert(false); } }; @@ -313,14 +307,15 @@ Reg_No reg_no() const { return _reg_no; } private: - // disallow copying +// disallow copying R_Opnd(const R_Opnd &): RM_Opnd(Reg) { assert(false); } }; -// -// a memory operand with displacement -// Can also serve as a full memory operand with base,index, displacement and scale. -// Use n_reg to specify 'no register', say, for index. +/** + * A memory operand with displacement. + * Can also serve as a full memory operand with base,index, displacement and scale. + * Use n_reg to specify 'no register', say, for index. + */ class M_Opnd: public RM_Opnd { protected: @@ -348,9 +343,8 @@ inline const Imm_Opnd & disp(void) const { return m_disp; } }; +/** A memory operand with base register and displacement.*/ // -// a memory operand with base register and displacement -// class M_Base_Opnd: public M_Opnd { public: @@ -361,10 +355,10 @@ // M_Base_Opnd(const M_Base_Opnd &): M_Opnd(0) { assert(false); } }; -// -// a memory operand with base register, scaled index register -// and displacement. -// +/** + * A memory operand with base register, scaled index register + * and displacement. + */ class M_Index_Opnd : public M_Opnd { public: @@ -390,9 +384,10 @@ XMM_Opnd(const XMM_Opnd &): Opnd(XMM) { assert(false); } }; -// -// operand structures for ia32 registers -// +/** + * @name + * Operand structures for ia32 registers + */ #ifdef _EM64T_ extern R_Opnd rax_opnd; @@ -449,51 +444,70 @@ #define ENCODER_DECLARE_EXPORT inline #include "encoder.inl" #endif - +/**@}*/ // prefix ENCODER_DECLARE_EXPORT char * prefix(char * stream, InstrPrefix p); - -// stack push and pop instructions +/** + * @name + * Stack push and pop instructions + * @{*/ ENCODER_DECLARE_EXPORT char * push(char * stream, const RM_Opnd & rm, Opnd_Size sz = size_platf); ENCODER_DECLARE_EXPORT char * push(char * stream, const Imm_Opnd & imm); ENCODER_DECLARE_EXPORT char * pop(char * stream, const RM_Opnd & rm, Opnd_Size sz = size_platf); - +/** @}*/ // cmpxchg or xchg ENCODER_DECLARE_EXPORT char * cmpxchg(char * stream, const RM_Opnd & rm, const R_Opnd & r, Opnd_Size sz = size_platf); ENCODER_DECLARE_EXPORT char * xchg(char * stream, const RM_Opnd & rm, const R_Opnd & r, Opnd_Size sz = size_platf); - -// inc(rement), dec(rement), not, neg(ate) instructions +/** + * @name + * inc(rement), dec(rement), not, neg(ate) instructions + * @{*/ ENCODER_DECLARE_EXPORT char * inc(char * stream, const RM_Opnd & rm, Opnd_Size sz = size_platf); ENCODER_DECLARE_EXPORT char * dec(char * stream, const RM_Opnd & rm, Opnd_Size sz = size_platf); ENCODER_DECLARE_EXPORT char * _not(char * stream, const RM_Opnd & rm, Opnd_Size sz = size_platf); ENCODER_DECLARE_EXPORT char * neg(char * stream, const RM_Opnd & rm, Opnd_Size sz = size_platf); ENCODER_DECLARE_EXPORT char * nop(char * stream); ENCODER_DECLARE_EXPORT char * int3(char * stream); - -// alu instructions: add, or, adc, sbb, and, sub, xor, cmp +/** @}*/ +/** + * @name + * alu instructions: add, or, adc, sbb, and, sub, xor, cmp + * @{*/ ENCODER_DECLARE_EXPORT char * alu(char * stream, ALU_Opcode opc, const RM_Opnd & rm, const Imm_Opnd & imm, Opnd_Size sz = size_platf); ENCODER_DECLARE_EXPORT char * alu(char * stream, ALU_Opcode opc, const M_Opnd & m, const R_Opnd & r, Opnd_Size sz = size_platf); ENCODER_DECLARE_EXPORT char * alu(char * stream, ALU_Opcode opc, const R_Opnd & r, const RM_Opnd & rm, Opnd_Size sz = size_platf); - -// test instruction +/** @}*/ +/** + * @name + * Test instruction + * @{*/ ENCODER_DECLARE_EXPORT char * test(char * stream, const RM_Opnd & rm, const Imm_Opnd & imm, Opnd_Size sz = size_platf); ENCODER_DECLARE_EXPORT char * test(char * stream, const RM_Opnd & rm, const R_Opnd & r, Opnd_Size sz = size_platf); - -// shift instructions: shl, shr, sar, shld, shrd, ror +/** @}*/ +/** + * @name + * Shift instructions: shl, shr, sar, shld, shrd, ror + * @{ */ ENCODER_DECLARE_EXPORT char * shift(char * stream, Shift_Opcode opc, const RM_Opnd & rm, const Imm_Opnd & imm, Opnd_Size sz = size_platf); ENCODER_DECLARE_EXPORT char * shift(char * stream, Shift_Opcode opc, const RM_Opnd & rm, Opnd_Size sz = size_platf); ENCODER_DECLARE_EXPORT char * shift(char * stream, Shift_Opcode opc, const RM_Opnd & rm, const R_Opnd & r, const Imm_Opnd & imm, Opnd_Size sz = size_platf); ENCODER_DECLARE_EXPORT char * shift(char * stream, Shift_Opcode opc, const RM_Opnd & rm, const R_Opnd & r, Opnd_Size sz = size_platf); - -// multiply instructions: mul, imul +/** @}*/ +/** + * @name + * Multiply instructions: mul, imul + * @{*/ ENCODER_DECLARE_EXPORT char * mul(char * stream, const RM_Opnd & rm, Opnd_Size sz = size_platf); ENCODER_DECLARE_EXPORT char * imul(char * stream, const R_Opnd & r, const RM_Opnd & rm, Opnd_Size sz = size_platf); ENCODER_DECLARE_EXPORT char * imul(char * stream, const R_Opnd & r, const Imm_Opnd & imm, Opnd_Size sz = size_platf); ENCODER_DECLARE_EXPORT char * imul(char * stream, const R_Opnd & r, const RM_Opnd & rm, const Imm_Opnd& imm, Opnd_Size sz = size_platf); - -// divide instructions: div, idiv +/** @}*/ +/** + * @name + * Divide instructions: div, idiv + * @{ */ ENCODER_DECLARE_EXPORT char * idiv(char * stream, const RM_Opnd & rm, Opnd_Size sz = size_platf); - +/** @}*/ // data movement: mov ENCODER_DECLARE_EXPORT char * mov(char * stream, const M_Opnd & m, const R_Opnd & r, Opnd_Size sz = size_platf); ENCODER_DECLARE_EXPORT char * mov(char * stream, const R_Opnd & r, const RM_Opnd & rm, Opnd_Size sz = size_platf); @@ -542,66 +556,78 @@ ENCODER_DECLARE_EXPORT char * sse_s2d(char * stream, const XMM_Opnd & xmm0, const M_Opnd & mem32); ENCODER_DECLARE_EXPORT char * sse_s2d(char * stream, const XMM_Opnd & xmm0, const XMM_Opnd & xmm1); -// condition operations +/** + * @name + * Condition operations + * @{*/ ENCODER_DECLARE_EXPORT char * cmov(char * stream, ConditionCode cc, const R_Opnd & r, const RM_Opnd & rm, Opnd_Size sz = size_platf); ENCODER_DECLARE_EXPORT char * setcc(char * stream, ConditionCode cc, const RM_Opnd & rm8); - -// load effective address: lea +/** @}*/ +/** Load effective address: lea.*/ ENCODER_DECLARE_EXPORT char * lea(char * stream, const R_Opnd & r, const M_Opnd & m, Opnd_Size sz = size_platf); ENCODER_DECLARE_EXPORT char * cdq(char * stream); ENCODER_DECLARE_EXPORT char * wait(char * stream); -// control-flow instructions +/** Control-flow instructions.*/ ENCODER_DECLARE_EXPORT char * loop(char * stream, const Imm_Opnd & imm); -// jump with 8-bit relative +/** Jump with 8-bit relative.*/ ENCODER_DECLARE_EXPORT char * jump8(char * stream, const Imm_Opnd & imm); -// jump with 32-bit relative +/** Jump with 32-bit relative.*/ ENCODER_DECLARE_EXPORT char * jump32(char * stream, const Imm_Opnd & imm); -// register indirect jump +/** Register indirect jump.*/ ENCODER_DECLARE_EXPORT char * jump(char * stream, const RM_Opnd & rm, Opnd_Size sz = size_platf); -// jump to target address +/** Jump to target address.*/ ENCODER_DECLARE_EXPORT char *jump(char * stream, char *target); -// jump with displacement +/** Jump with displacement.*/ //char * jump(char * stream, int32 disp); -// conditional branch with 8-bit branch offset +/** Conditional branch with 8-bit branch offset.*/ ENCODER_DECLARE_EXPORT char * branch8(char * stream, ConditionCode cc, const Imm_Opnd & imm, InstrPrefix prefix = no_prefix); -// conditional branch with 32-bit branch offset +/** Conditional branch with 32-bit branch offset.*/ ENCODER_DECLARE_EXPORT char * branch32(char * stream, ConditionCode cc, const Imm_Opnd & imm, InstrPrefix prefix = no_prefix); -// conditional branch with target label address +/** Conditional branch with target label address.*/ //char * branch(char * stream, ConditionCode cc, const char * target, InstrPrefix prefix = no_prefix); -// conditional branch with displacement immediate +/** Conditional branch with displacement immediate.*/ ENCODER_DECLARE_EXPORT char * branch(char * stream, ConditionCode cc, int32 disp, InstrPrefix prefix = no_prefix); -// call with displacement +/** Call with displacement.*/ ENCODER_DECLARE_EXPORT char * call(char * stream, const Imm_Opnd & imm); -// indirect call through register or memory location +/** Indirect call through register or memory location.*/ ENCODER_DECLARE_EXPORT char * call(char * stream, const RM_Opnd & rm, Opnd_Size sz = size_platf); -// call target address +/** Call target address.*/ ENCODER_DECLARE_EXPORT char * call(char * stream, const char * target); - -// return instruction +/** @}*/ +/** + * @name + * Return instruction + * @{ */ ENCODER_DECLARE_EXPORT char * ret(char * stream); ENCODER_DECLARE_EXPORT char * ret(char * stream, unsigned short pop); ENCODER_DECLARE_EXPORT char * ret(char * stream, const Imm_Opnd & imm); - -// string operations +/** @}*/ +/** + * @name + * String operations + * @{ */ ENCODER_DECLARE_EXPORT char * set_d(char * stream, bool set); ENCODER_DECLARE_EXPORT char * scas(char * stream, unsigned char prefix); ENCODER_DECLARE_EXPORT char * stos(char * stream, unsigned char prefix); +/** @}*/ +/** + * @name + * Floating-point instructions + * @{ */ -// floating-point instructions - // st(0) = st(0) fp_op m{32,64}real //!char * fp_op_mem(char * stream, FP_Opcode opc,const M_Opnd& mem,int is_double); @@ -646,9 +672,11 @@ //!char * pushfd(char * stream); //!char * popad(char * stream); //!char * popfd(char * stream); - -// stack frame allocation instructions: enter & leave -// +/** @}*/ +/** + * @name + * Stack frame allocation instructions: enter & leave + * @{*/ // enter frame_size // // is equivalent to: @@ -681,10 +709,11 @@ //!char *math_fsqrt(char * stream); //!char *math_fptan(char * stream); +/** + * Add 1-7 bytes padding, with as few instructions as possible, + * with no effect on the processor state (e.g., registers, flags) + */ // -// Add 1-7 bytes padding, with as few instructions as possible, -// with no effect on the processor state (e.g., registers, flags) -// //!char *padding(char * stream, unsigned num); // prolog and epilog code generation @@ -702,5 +731,5 @@ // mfence : Memory Fence //!char *mfence(char * stream); - +/** @}*/ #endif // _VM_ENCODER_H_ Index: src/lil/em64t/pim/include/lil_code_generator_em64t.h =================================================================== --- src/lil/em64t/pim/include/lil_code_generator_em64t.h (revision 525148) +++ src/lil/em64t/pim/include/lil_code_generator_em64t.h (working copy) @@ -1,10 +1,10 @@ -/* +/** * Licensed to the Apache Software Foundation (ASF) under one or more - * contributor license agreements. See the NOTICE file distributed with + * contributor license agreements. See the NOTICE file distributed with * this work for additional information regarding copyright ownership. * The ASF licenses this file to You under the Apache License, Version 2.0 * (the "License"); you may not use this file except in compliance with - * the License. You may obtain a copy of the License at + * the License. You may obtain a copy of the License at * * http://www.apache.org/licenses/LICENSE-2.0 * @@ -15,14 +15,14 @@ * limitations under the License. */ -/** - * @author Evgueni Brevnov - * @version $Revision$ - */ +/** @version $Revision$*/ /** - * Stack frame layout created by LIL CG on EM64T - * + * @file + * LIL CG on EM64T description + * + * Stack frame layout created by LIL CG on EM64T: + *
          *    |--------------------------|
          *    | Extra inputs             |
          *    |--------------------------| <--- previouse stack frame bottom
        @@ -39,14 +39,15 @@
          *    |--------------------------|
          *    | Extra outputs            |
          *    |==========================| <--- current stack frame bottom
        + *
        * - * Note: - * EM64T architecture requires stack frame bottom address - * to be aligned on 16 byte boundary (rsp % 16 == 0) + * @note EM64T architecture requires stack frame bottom address to be aligned + * on 16 byte boundary (rsp % 16 == 0) * - * Register usage: - * r12-r15 are used for lil local variables (l0-l3) - * r10-r11 are used for lil standard places (sp0-sp1) + * Register usage: + *
          + *
        • r12-r15 are used for lil local variables (l0-l3)
        • + *
        • r10-r11 are used for lil standard places (sp0-sp1)
        • */ #ifndef _LIL_CODE_GENERATOR_EM64T_ @@ -57,87 +58,83 @@ #include "encoder.h" -/** - * rounds up an integer value to the closest multiple of 8 - */ +/** Rounds up an integer value to the closest multiple of 8.*/ inline unsigned align_8(unsigned n) { return (n + 0x7) & ~0x7; } -/** - * rounds up an integer value to the closest multiple of 16 - */ +/** Rounds up an integer value to the closest multiple of 16.*/ inline unsigned align_16(unsigned n) { return (n + 0xF) & ~0xF; } /** -* an enum indicating a variable's location: in a register class or on the -* stack (no LIL variable is ever on the heap!) -*/ + * An enum indicating a variable's location: in a register class or on the + * stack (no LIL variable is ever on the heap!) + */ enum LcgEM64TLocKind { - LLK_Gr, // 64-bit general purpose registers - LLK_Fr, // 128-bit xmm registers - LLK_GStk, // memory stack which holds gp value - LLK_FStk // memory stack which holds fp value + LLK_Gr, /** 64-bit general purpose registers.*/ + LLK_Fr, /** 128-bit xmm registers*/ + LLK_GStk, /** Memory stack which holds gp value.*/ + LLK_FStk /** Memory stack which holds fp value.*/ }; class LcgEM64TContext: public LilInstructionVisitor { public: #ifdef _WIN64 - // maximum number of GR reserved for returns +/** Maximum number of GR reserved for returns.*/ static const unsigned MAX_GR_RETURNS = 1; - // maximum number of GR reserved for outputs/inputs +/** Maximum number of GR reserved for outputs/inputs.*/ static const unsigned MAX_GR_OUTPUTS = 4; - // maximum number of locals that can be placed in GR +/** Maximum number of locals that can be placed in GR.*/ static const unsigned MAX_GR_LOCALS = 8; - // maximum number of stand places +/** Maximum number of stand places.*/ static const unsigned MAX_STD_PLACES = 2; - // maximum number of FR reserved for returns +/** Maximum number of FR reserved for returns.*/ static const unsigned MAX_FR_RETURNS = 1; - // maximum number of FR reserved for outputs/inputs +/** Maximum number of FR reserved for outputs/inputs.*/ static const unsigned MAX_FR_OUTPUTS = 4; - // maximum number of temporary XMM registers +/** Maximum number of temporary XMM registers.*/ static const unsigned MAX_FR_LOCALS = 10; - // maximum number of temporary XMM registers +/** Maximum number of temporary XMM registers.*/ static const unsigned MAX_FR_TEMPORARY = 2; #else - // maximum number of GR reserved for returns +/** Maximum number of GR reserved for returns.*/ static const unsigned MAX_GR_RETURNS = 2; - // maximum number of GR reserved for outputs/inputs +/** Maximum number of GR reserved for outputs/inputs.*/ static const unsigned MAX_GR_OUTPUTS = 6; - // maximum number of locals that can be placed in GR +/** Maximum number of locals that can be placed in GR.*/ static const unsigned MAX_GR_LOCALS = 6; - // maximum number of stand places +/** Maximum number of stand places.*/ static const unsigned MAX_STD_PLACES = 2; - // maximum number of FR reserved for returns +/** Maximum number of FR reserved for returns.*/ static const unsigned MAX_FR_RETURNS = 2; - // maximum number of FR reserved for outputs/inputs +/** Maximum number of FR reserved for outputs/inputs.*/ static const unsigned MAX_FR_OUTPUTS = 8; - // maximum number of temporary XMM registers +/** Maximum number of temporary XMM registers.*/ static const unsigned MAX_FR_LOCALS = 8; - // maximum number of temporary XMM registers +/** Maximum number of temporary XMM registers.*/ static const unsigned MAX_FR_TEMPORARY = 0; #endif - // size of GR in bytes +/** Size of GR in bytes.*/ // TODO: Think about using GR_STACK_SIZE static const unsigned GR_SIZE = 8; - // size of FR in bytes +/** Size of FR in bytes.*/ // TODO: Think about using FR_STACK_SIZE static const unsigned FR_SIZE = 8; - // offsets for the REG_MAP array +/** Offsets for the REG_MAP array.*/ static const unsigned STD_PLACES_OFFSET = 0; static const unsigned GR_LOCALS_OFFSET = STD_PLACES_OFFSET + MAX_STD_PLACES; static const unsigned GR_OUTPUTS_OFFSET = GR_LOCALS_OFFSET + MAX_GR_LOCALS; static const unsigned GR_RETURNS_OFFSET = GR_OUTPUTS_OFFSET + MAX_GR_OUTPUTS; static const unsigned RSP_OFFSET = GR_RETURNS_OFFSET + MAX_GR_RETURNS; - // offsets for the XMM_REG_MAP array +/** Offsets for the XMM_REG_MAP array.*/ static const unsigned FR_OUTPUTS_OFFSET = 0; static const unsigned FR_RETURNS_OFFSET = FR_OUTPUTS_OFFSET + MAX_FR_OUTPUTS; static const unsigned FR_TEMPORARY_OFFSET = FR_RETURNS_OFFSET + MAX_FR_RETURNS; @@ -145,49 +142,67 @@ private: - LilCodeStub * cs; // the code stub - tl::MemoryPool & mem; // a memory manager - LilInstructionIterator iter; // instruction iterator + LilCodeStub * cs; /** The code stub.*/ + tl::MemoryPool & mem; /** A memory manager.*/ + LilInstructionIterator iter; /** Instruction iterator.*/ - unsigned n_inputs; // total number of inputs - unsigned n_gr_inputs; // total number of GRs reserved for inputs + unsigned n_inputs; /** Total number of inputs.*/ + unsigned n_gr_inputs; /** Total number of GRs reserved for inputs.*/ #ifdef _WIN64 - // Windows x64 has 4 slots for both integer and float inputs +/** Windows x64 has 4 slots for both integer and float inputs.*/ #define n_fr_inputs n_gr_inputs #else - unsigned n_fr_inputs; // total number of FRs reserved for inputs + unsigned n_fr_inputs; /** Total number of FRs reserved for inputs.*/ #endif - unsigned n_outputs; // total number of outputs - unsigned n_gr_outputs; // total number of GRs reserved for outputs + unsigned n_outputs; /** Total number of outputs.*/ + unsigned n_gr_outputs; /** Total number of GRs reserved for outputs.*/ #ifdef _WIN64 - // Windows x64 has 4 slots for both integer and float inputs +/** Windows x64 has 4 slots for both integer and float inputs.*/ #define n_fr_outputs n_gr_outputs #else - unsigned n_fr_outputs; // total number of FRs reserved for outputs + unsigned n_fr_outputs; /** Total number of FRs reserved for outputs.*/ #endif - /// Number of GR registers currently allocated for temporary needs. +/** Number of GR registers currently allocated for temporary needs.*/ unsigned m_tmp_grs_used; - /// Number of XMM registers currently allocated for temporary needs. +/** Number of XMM registers currently allocated for temporary needs.*/ unsigned m_tmp_xmms_used; - unsigned stk_m2n_size; // size reserved for the m2n frame - unsigned stk_input_gr_save_size; // size reserved for saving GR inputs - unsigned stk_input_fr_save_size; // size reserved for saving FR inputs - unsigned stk_alloc_size; // size of allocatable memory on the stack - unsigned stk_output_size; // bytes needed for outgoing params on the stack - unsigned stk_size; // total size of the memory stack frame (in bytes) + unsigned stk_m2n_size; +/** Size reserved for the M2N frame.*/ + unsigned stk_input_gr_save_size; +/** Size reserved for saving GR inputs.*/ + unsigned stk_input_fr_save_size; +/** Size reserved for saving FR inputs.*/ + unsigned stk_alloc_size; +/** Size of allocatable memory on the stack.*/ + unsigned stk_output_size; +/** Bytes needed for outgoing params on the stack.*/ + unsigned stk_size; +/** Total size of the memory stack frame (in bytes).*/ - Method_Handle m2n_method; // method handle of the m2n frame - frame_type m2n_frame_type; // m2n frame type + Method_Handle m2n_method; /** Method handle of the M2N frame.*/ + frame_type m2n_frame_type; /** M2N frame type.*/ - bool m2n_handles; // true if m2n contains local handles - bool does_normal_calls; // true if the stub contains "normal" calls - bool does_tail_calls; // true if the stub contains tail calls - bool calls_unmanaged_code; // true if the stub calls calls code with a calling convention other than managed - bool has_m2n; // true if the stub contains push_m2n/pop_m2n instructions - bool save_inputs; // true if inputs are accessed after a normal call + bool m2n_handles; +/** TRUE if M2N contains local handles.*/ + bool does_normal_calls; +/** TRUE if the stub contains "normal" calls.*/ + bool does_tail_calls; +/** TRUE if the stub contains tail calls.*/ + bool calls_unmanaged_code; +/** + * TRUE if the stub calls calls code with a calling convention + *other than managed. + */ + bool has_m2n; +/** + * TRUE if the stub contains push_m2n/pop_m2n + * instructions. + */ + bool save_inputs; +/** TRUE if inputs are accessed after a normal call.*/ public: @@ -195,10 +210,10 @@ LcgEM64TContext(LilCodeStub * stub, tl::MemoryPool & m); #ifdef _WIN64 - /** - * returns general purpose register associated with given index - * this association is used across whole lil code generator - */ + /** + * Returns general purpose register associated with given index + * this association is used across whole lil code generator. + */ static const R_Opnd & get_reg_from_map(unsigned index) { static const R_Opnd * REG_MAP[] = { // std places (scratched) @@ -216,10 +231,10 @@ return *REG_MAP[index]; } - /** - * returns xmm register associated with given index - * this association is used across whole lil code generator - */ +/** + * Returns xmm register associated with given index + * this association is used across whole lil code generator. + */ static const XMM_Opnd & get_xmm_reg_from_map(unsigned index) { static const XMM_Opnd * XMM_REG_MAP[] = { // fr inputs/outputs (scratched) @@ -236,9 +251,7 @@ return *XMM_REG_MAP[index]; } - /** - * an association between register number and index in the REG_MAP array - */ +/** An association between register number and index in the REG_MAP array.*/ static unsigned get_index_in_map(const Reg_No reg) { static const unsigned INDEX_MAP[] = { // rax_reg, rbx_reg, rcx_reg, @@ -283,10 +296,10 @@ return *REG_MAP[index]; } - /** - * returns xmm register associated with given index - * this association is used across whole lil code generator - */ +/** + * Returns xmm register associated with given index + * this association is used across whole lil code generator. + */ static const XMM_Opnd & get_xmm_reg_from_map(unsigned index) { static const XMM_Opnd * XMM_REG_MAP[] = { // fr inputs/outputs (scratched) @@ -301,9 +314,7 @@ return *XMM_REG_MAP[index]; } - /** - * an association between register number and index in the REG_MAP array - */ +/** An association between register number and index in the REG_MAP array.*/ static unsigned get_index_in_map(const Reg_No reg) { static const unsigned INDEX_MAP[] = { // rax_reg, rbx_reg, rcx_reg, @@ -338,38 +349,34 @@ void operator delete (void * p, tl::MemoryPool & m) {} - /** - * returns the number of incoming arguments - */ +/** Returns the number of incoming arguments.*/ unsigned get_num_inputs() const { return n_inputs; } - /** - * returns the number of incoming arguments stored in GRs - */ +/** Returns the number of incoming arguments stored in GRs.*/ unsigned get_num_gr_inputs() const { assert(n_gr_inputs <= MAX_GR_OUTPUTS); return n_gr_inputs; } - /** - * Returns *reference* to the number of temporary GR registers currently allocated. - */ +/** + * Returns *reference* to the number of temporary GR registers currently allocated. + */ unsigned& get_tmp_grs_used(void) { - return m_tmp_grs_used; + return m_tmp_grs_used; } - /** - * Returns *reference* to the number of temporary XMM registers currently allocated. - */ +/** + * Returns *reference* to the number of temporary XMM registers currently allocated. + */ unsigned& get_tmp_xmms_used(void) { return m_tmp_xmms_used; } - - /** - * returns the number of incoming arguments stored in FRs - */ + +/** + * Returns the number of incoming arguments stored in FRs. + */ unsigned get_num_fr_inputs() const { assert(n_fr_inputs <= MAX_FR_OUTPUTS); return n_fr_inputs; @@ -389,106 +396,97 @@ return n_fr_outputs; } - /** - * returns true if m2n is required on the activation frame - */ +/** Returns TRUE if M2N is required on the activation frame.*/ bool has_m2n_frame() const { return has_m2n; } - /** - * returns true if we need to reserve space on the stack to save inputs - */ +/** Returns TRUE if we need to reserve space on the stack to save inputs.*/ bool must_save_inputs() const { return save_inputs; } - /** - * true if type represents floating point value - */ +/** TRUE if type represents floating point value.*/ bool is_fp_type(LilType t) const { return t == LT_F4 || t == LT_F8; } - /** - * method which corresponds to the m2n frame - */ +/** Method which corresponds to the M2N frame.*/ Method_Handle get_m2n_method() const { return m2n_method; } - /** - * m2n frame type - */ +/** M2N frame type*/ frame_type get_m2n_frame_type() const { return m2n_frame_type; } - /** - * returns true if m2n contains local handles - */ +/** Returns TRUE if M2N contains local handles.*/ bool m2n_has_handles() const { return m2n_handles; } - // returns the offset of the start of the m2n frame +/** Returns the offset of the start of the M2N frame.*/ unsigned get_m2n_offset() const { return get_input_gr_save_offset() + stk_input_gr_save_size; } - // returns the offset of the start of the gr input register save space +/** Returns the offset of the start of the gr input register save space.*/ unsigned get_input_gr_save_offset() const { return get_input_fr_save_offset() + stk_input_fr_save_size; } - // returns the offset of the start of the fr input register save space +/** Returns the offset of the start of the fr input register save space.*/ unsigned get_input_fr_save_offset() const { return get_alloc_start_offset() + stk_alloc_size; } - // returns the offset of the first "allocatable" byte +/** Returns the offset of the first "allocatable" byte.*/ unsigned get_alloc_start_offset() const { return get_output_offset() + stk_output_size; } - // returns the offset of the start of the m2n frame +/** Returns the offset of the start of the M2N frame.*/ unsigned get_output_offset() const { return 0; } - // size reserved for saving GR inputs +/** Size reserved for saving GR inputs.*/ unsigned get_stk_input_gr_save_size() const { return stk_input_gr_save_size; } - // size reserved for saving FR inputs +/** Size reserved for saving FR inputs.*/ unsigned get_stk_input_fr_save_size() const { return stk_input_fr_save_size; } - // size of allocatable memory on the stack +/** Size of allocatable memory on the stack.*/ unsigned get_stk_alloc_size() const { return stk_alloc_size; } - // size reserved for the m2n frame +/** Size reserved for the M2N frame.*/ unsigned get_stk_m2n_size() const { return stk_m2n_size; } - // bytes needed for outgoing params on the stack +/** Bytes needed for outgoing params on the stack.*/ unsigned get_stk_output_size() const { return stk_output_size; } - // returns the size of the stack frame +/** Returns the size of the stack frame.*/ unsigned get_stk_size() const { return stk_size; } private: - /* Helper functions, used by visitor functions */ +/** + * @name Helper functions, used by visitor functions + * @{ + */ // gather info from variable void check_variable(LilVariable * var, bool lvalue) { @@ -512,18 +510,19 @@ } } - // gather info from operand +/** Gather info from operand.*/ void check_operand(LilOperand * o, bool lvalue) { if (o != NULL && !lil_operand_is_immed(o)) { check_variable(lil_operand_get_variable(o), lvalue); } } +/** @}*/ +/** + * @name Visitor functions + * @{ + */ - - //************************** - // visitor functions - void label(LilLabel label) { // nothing to do here } @@ -699,10 +698,9 @@ void print(char *, LilOperand *) { } }; +/** @}*/ -/** -* keeps location of a LIL variable -*/ +/** Keeps location of a LIL variable.*/ class LcgEM64TLoc { public: Index: src/lil/em64t/pim/m2n_em64t_internal.h =================================================================== --- src/lil/em64t/pim/m2n_em64t_internal.h (revision 525148) +++ src/lil/em64t/pim/m2n_em64t_internal.h (working copy) @@ -1,10 +1,10 @@ -/* +/** * Licensed to the Apache Software Foundation (ASF) under one or more - * contributor license agreements. See the NOTICE file distributed with + * contributor license agreements. See the NOTICE file distributed with * this work for additional information regarding copyright ownership. * The ASF licenses this file to You under the Apache License, Version 2.0 * (the "License"); you may not use this file except in compliance with - * the License. You may obtain a copy of the License at + * the License. You may obtain a copy of the License at * * http://www.apache.org/licenses/LICENSE-2.0 * @@ -15,18 +15,20 @@ * limitations under the License. */ -/** - * @author Evgueni Brevnov - * @version $Revision$ - */ +/** @version $Revision$*/ #ifndef _M2N_EM64T_INTERNAL_H_ #define _M2N_EM64T_INTERNAL_H_ -// This file describes the internal EM64T interface of m2n frames. -// It can be used by stubs to generate code to push and pop m2n frames, to update object handles fields, and -// to access the arguments from managed to native code. -// It is also used by stack iterators. +/** + * @file + * The internal M2nFrame EM64T interface description. + * + * The internal EM64T interface of M2n frames can be used by stubs to generate + * code to push and pop M2n frames, to update object handles fields, and to + * access the arguments from managed to native code. + * It is also used by stack iterators. + */ #include "m2n.h" #include "open/types.h" @@ -37,17 +39,21 @@ typedef struct M2nFrame M2nFrame; /** - * There are two types of M2nFrames: those that result from managed code calling a stub, + * There are two types of M2n frames: those that result from managed code calling a stub, * and those that represent suspended managed code. The second type is needed to deal with * throwing exceptions from OS contexts with the exception filter or signal mechanisms. * For the first type: - * rip points to the instruction past the one in question - * the bottom two bits of p_lm2nf are zero - * regs is not present, and is implicitly the address of the word above rip + *
            + *
          • rip points to the instruction past the one in question
          • + *
          • the bottom two bits of p_lm2nf are zero
          • + *
          • regs is not present, and is implicitly the address of the word above rip
          • + *
          * For the second type: - * rip points to the instruction in question - * p_lm2nf==1 - * regs is present + *
            + *
          • rip points to the instruction in question
          • + *
          • p_lm2nf==1
          • + *
          • regs is present
          • + *
          */ struct M2nFrame { M2nFrame * prev_m2nf; @@ -66,13 +72,11 @@ uint64 r13; uint64 r12; uint64 rip; - // This is only for M2nFrames for suspended managed code (as against ones that call stubs) + // This is only for M2nFrame for suspended managed code (as against ones that call stubs) Registers * regs; }; -/** - * returns size of m2n frame in bytes - */ +/** Returns size of M2nFrame in bytes.*/ inline size_t m2n_get_size() { // omit regs return sizeof(M2nFrame) - 16; @@ -87,40 +91,44 @@ unsigned num_std_need_to_save, unsigned num_ret_need_to_save); /** - * Generate code to set the local handles of an M2nFrame. - * The M2nFrame is located bytes_to_m2n above rsp, and src_reg has the address of the frames. + * Generate code to set the local handles of an M2n frame. + * The M2nFrame is located bytes_to_m2n above rsp, and + * src_reg has the address of the frames. */ char * m2n_gen_set_local_handles_r(char * buf, unsigned bytes_to_m2n, const R_Opnd * src_reg); char * m2n_gen_set_local_handles_imm(char * buf, unsigned bytes_to_m2n, const Imm_Opnd * imm); /** - * Generate code to push an M2nFrame onto the stack. - * It assumes that num_callee_saves registers have already been saved and the rest have been preserved, - * that the saved registers are immediately below the return address, and that rsp points to the last one saved. + * Generate code to push M2nFrame onto the stack. + * It assumes that num_callee_saves registers have already been + * saved and the rest have been preserved, that the saved registers are + * immediately below the return address, and that rsp points to the last one saved. * The order for callee saves is r12, r13, r14, r15, rbp, rbx. * It destroys returns (rax) and outputs. - * After the sequence, rsp points to the M2nFrame. + * After the sequence, rsp points to M2nFrame. * - * @param handles Indicates whether the stub will want local handles or not - * @param bytes_to_m2n_top Number of bytes to the beginning of m2n frame relative to the current rsp value. - Negative value means that current rsp is above m2n bottom. + * @param handles - indicates whether the stub will want local handles or not + * @param bytes_to_m2n_top - number of bytes to the beginning of M2nFrame + * relative to the current rsp value; negative value + * means that current rsp is above M2n bottom */ char * m2n_gen_push_m2n(char * buf, Method_Handle method, frame_type current_frame_type, bool handles, unsigned num_callee_saves, unsigned num_std_need_to_save, int32 bytes_to_m2n_top); /** - * Generate code to pop an M2nFrame off the stack. - * @param num_callee_saves Number of callee saves registers to leave - * on the stack as at the entry to push_m2n. - * @param bytes_to_m2n_bottom Number of bytes between rsp and the bottom of the M2nFrame. - * @param preserve_ret Number of return registers to preserve, 0 means none, - * 1 means rax, 2 means rax & rdx. - * @param handles As for push_m2n, frees the handles if true. + * Generate code to pop an M2n frame off the stack. + * + * @param num_callee_saves - number of callee saves registers to leave + * on the stack as at the entry to push_m2n + * @param bytes_to_m2n_bottom - number of bytes between rsp and the bottom of M2nFrame + * @param preserve_ret - number of return registers to preserve, 0 means none, + * 1 means rax, 2 means rax & rdx + * @param handles - as for push_m2n, frees the handles if TRUE */ char * m2n_gen_pop_m2n(char * buf, bool handles, unsigned num_callee_saves, int32 bytes_to_m2n_bottom, unsigned preserve_ret); -// returns top of the specified frame on the stack (it should point to return ip) +/** Returns top of the specified frame on the stack (it should point to return ip)*/ void * m2n_get_frame_base(M2nFrame *); #endif // _M2N_EM64T_INTERNAL_H_ Index: src/lil/ia32/pim/include/lil_code_generator_ia32.h =================================================================== --- src/lil/ia32/pim/include/lil_code_generator_ia32.h (revision 525148) +++ src/lil/ia32/pim/include/lil_code_generator_ia32.h (working copy) @@ -1,10 +1,10 @@ -/* +/** * Licensed to the Apache Software Foundation (ASF) under one or more - * contributor license agreements. See the NOTICE file distributed with + * contributor license agreements. See the NOTICE file distributed with * this work for additional information regarding copyright ownership. * The ASF licenses this file to You under the Apache License, Version 2.0 * (the "License"); you may not use this file except in compliance with - * the License. You may obtain a copy of the License at + * the License. You may obtain a copy of the License at * * http://www.apache.org/licenses/LICENSE-2.0 * @@ -14,12 +14,10 @@ * See the License for the specific language governing permissions and * limitations under the License. */ -/** - * @author Intel, Evgueni Brevnov, Ivan Volosyuk - * @version $Revision: 1.1.2.1.4.4 $ - */ +/** @version $Revision: 1.1.2.1.4.4 $*/ +/** + */ - #ifndef _LIL_CODE_GENERATOR_IA32_ #define _LIL_CODE_GENERATOR_IA32_ Index: src/lil/ia32/pim/m2n_ia32_internal.h =================================================================== --- src/lil/ia32/pim/m2n_ia32_internal.h (revision 525148) +++ src/lil/ia32/pim/m2n_ia32_internal.h (working copy) @@ -1,4 +1,4 @@ -/* +/** * Licensed to the Apache Software Foundation (ASF) under one or more * contributor license agreements. See the NOTICE file distributed with * this work for additional information regarding copyright ownership. @@ -14,19 +14,20 @@ * See the License for the specific language governing permissions and * limitations under the License. */ -/** - * @author Intel, Evgueni Brevnov, Ivan Volosyuk - * @version $Revision: 1.1.2.1.4.4 $ - */ +/** @version $Revision: 1.1.2.1.4.4 $*/ - #ifndef _M2N_IA32_INTERNAL_H_ #define _M2N_IA32_INTERNAL_H_ -// This file describes the internal IPF interface of m2n frames. -// It can be used by stubs to generate code to push and pop m2n frames, to update object handles fields, and -// to access the arguments from managed to native code. -// It is also used by stack iterators. +/** + * @file + * The internal M2nFrame IPF interface description + * + * It can be used by stubs to generate code to push and pop M2n + * frames, to update object handles fields, and to access the arguments from + * managed to native code. + * It is also used by stack iterators. + */ #include "m2n.h" #include "vm_threads.h" @@ -34,58 +35,82 @@ class R_Opnd; -// Return a pointer to the argument just above the return address of an M2nFrame +/** + * Return a pointer to the argument just above the return address of + * an M2nFrame. + */ uint32* m2n_get_args(M2nFrame*); -// An M2nFrame is a structure that resides on the stack. -// It takes up space below and including the return address to the managed code, and thus is immediately below the arguments. - -// This is the size of the structure that goes on the stack. +/** + * The size of the structure that goes on the stack. + * + * An M2nFrame is a structure that resides on the stack. + * It takes up space below and including the return address to the managed code, + * and thus is immediately below the arguments. + */ const unsigned m2n_sizeof_m2n_frame = 44; -// Generate code to put the thread local storage pointer into a given register +/** Generate code to put the thread local storage pointer into a given register.*/ unsigned m2n_ts_to_register_size(); char* m2n_gen_ts_to_register(char* buf, R_Opnd* reg); -// Generate code to push an M2nFrame onto the stack. -// It assumes that num_callee_saves registers have already been saved and the rest have been preserved, that the saved registers are immediately -// below the return address, and that esp points to the last one saved. The order for callee saves is ebp, ebx, esi, edi. -// It destroys eax. -// After the sequence, esp points to the M2nFrame. +/** + * Generate code to push an M2nFrame onto the stack. + * It assumes that num_callee_saves registers have already been + * saved and the rest have been preserved, that the saved registers are immediately + * below the return address, and that esp points to the last one saved. The + * order for callee saves is ebp, ebx, esi, edi. + * It destroys eax. + * After the sequence, esp points to the M2nFrame. + */ // handles: will the stub want local handles or not unsigned m2n_push_m2n_size(bool handles, unsigned num_callee_saves); char* m2n_gen_push_m2n(char* buf, Method_Handle method, frame_type current_frame_type, bool handles, unsigned num_callee_saves); -// Generate code to set the local handles of an M2nFrame -// The M2nFrame is located bytes_to_m2n above esp, and src_reg has the address of the frames. +/** + * Generate code to set the local handles of an M2nFrame. + * The M2nFrame is located bytes_to_m2n above esp, and + * src_reg has the address of the frames. + */ unsigned m2n_set_local_handles_size(unsigned bytes_to_m2n); char* m2n_gen_set_local_handles(char* buf, unsigned bytes_to_m2n, R_Opnd* src_reg); -// Generate code to pop an M2nFrame off the stack. -// num_callee_saves: the number of callee saves registers to leave on the stack as at the entry to push_m2n. -// extra_on_stack: the number of bytes between esp and the bottom of the M2nFrame. -// preserve_ret: the number of return registers to preserve, 0 means none, 1 means eax, 2 means eax & edx; st(0) is always preserved. -// handles: as for push_m2n, frees the handles if true. +/** + * Generate code to pop an M2nFrame off the stack. + * + * @param num_callee_saves - the number of callee saves registers to leave + * on the stack as at the entry to push_m2n + * @param extra_on_stack - the number of bytes between esp and the bottom of + * the M2nFrame + * @param preserve_ret - the number of return registers to preserve, 0 means + * none, 1 means eax, 2 means eax & edx; st(0) is + * always preserved. + * @param handles - as for push_m2n, frees the handles if + * TRUE + */ unsigned m2n_pop_m2n_size(bool handles, unsigned num_callee_saves, unsigned extra_on_stack, unsigned preserve_ret); char* m2n_gen_pop_m2n(char* buf, bool handles, unsigned num_callee_saves, unsigned extra_on_stack, unsigned preserve_ret); -////////////////////////////////////////////////////////////////////////// -// Implementation details - -// This information is used by the m2n implementation and the stack iterator implementation. -// It may not be used by any other module. - -// There are two types of M2nFrames: those that result from managed code calling a stub, and those that represent suspended managed code. -// The second type is needed to deal with throwing exceptions from OS contexts with the exception filter or signal mechanisms. -// For the first type: -// eip points to the instruction past the one in question (ie is the return address into managed code) -// the bottom two bits of p_lm2nf are zero -// regs is not present, and is implicitly the address of the word above eip -// For the second type: -// eip points to the instruction in question -// p_lm2nf==1 -// regs is present - +/** + * Implementation details used by the m2n implementation and the stack iterator + * implementation. It may not be used by any other module. + * + * There are two types of M2n frames: those that result from managed code calling a stub, + * and those that represent suspended managed code. The second type is needed to deal with + * throwing exceptions from OS contexts with the exception filter or signal mechanisms. + * For the first type: + *
            + *
          • eip points to the instruction past the one in question (ie is the return address into managed code)
          • + *
          • the bottom two bits of p_lm2nf are zero
          • + *
          • regs is not present, and is implicitly the address of the word above eip
          • + *
          + * For the second type: + *
            + *
          • eip points to the instruction in question
          • + *
          • p_lm2nf==1
          • + *
          • regs is present
          • + *
          + */ #ifdef _EM64T_ #error Wrong header file. #endif Index: src/lil/ipf/pim/include/lil_code_generator_ipf.h =================================================================== --- src/lil/ipf/pim/include/lil_code_generator_ipf.h (revision 525148) +++ src/lil/ipf/pim/include/lil_code_generator_ipf.h (working copy) @@ -1,10 +1,10 @@ -/* +/** * Licensed to the Apache Software Foundation (ASF) under one or more - * contributor license agreements. See the NOTICE file distributed with + * contributor license agreements. See the NOTICE file distributed with * this work for additional information regarding copyright ownership. * The ASF licenses this file to You under the Apache License, Version 2.0 * (the "License"); you may not use this file except in compliance with - * the License. You may obtain a copy of the License at + * the License. You may obtain a copy of the License at * * http://www.apache.org/licenses/LICENSE-2.0 * @@ -14,23 +14,21 @@ * See the License for the specific language governing permissions and * limitations under the License. */ -/** - * @author Intel, Evgueni Brevnov, Ivan Volosyuk - * @version $Revision: 1.1.2.1.4.4 $ - */ +/** @version $Revision: 1.1.2.1.4.4 $*/ - #ifndef _LIL_CODE_GENERATOR_IPF_ #define _LIL_CODE_GENERATOR_IPF_ #include "lil.h" #include "lil_code_generator.h" -// this class is for internal use only; it is declared in -// lil_code_generator_ipf.cpp class LcgIpfContext; class Merced_Code_Emitter; +/** + * This class is for internal use only; it is declared in + * lil_code_generator_ipf.cpp. + */ class LilCodeGeneratorIpf : public LilCodeGenerator { public: Index: src/lil/ipf/pim/m2n_ipf_internal.h =================================================================== --- src/lil/ipf/pim/m2n_ipf_internal.h (revision 525148) +++ src/lil/ipf/pim/m2n_ipf_internal.h (working copy) @@ -1,10 +1,10 @@ -/* +/** * Licensed to the Apache Software Foundation (ASF) under one or more - * contributor license agreements. See the NOTICE file distributed with + * contributor license agreements. See the NOTICE file distributed with * this work for additional information regarding copyright ownership. * The ASF licenses this file to You under the Apache License, Version 2.0 * (the "License"); you may not use this file except in compliance with - * the License. You may obtain a copy of the License at + * the License. You may obtain a copy of the License at * * http://www.apache.org/licenses/LICENSE-2.0 * @@ -14,100 +14,157 @@ * See the License for the specific language governing permissions and * limitations under the License. */ -/** - * @author Intel, Evgueni Brevnov, Ivan Volosyuk - * @version $Revision: 1.1.2.1.4.4 $ - */ +/** @version $Revision: 1.1.2.1.4.4 $*/ #ifndef _M2N_IPF_INTERNAL_H_ #define _M2N_IPF_INTERNAL_H_ -// This file describes the internal IPF interface of m2n frames. -// It can be used by stubs to generate code to push and pop m2n frames and to update object handles fields. -// It is also used by stack iterators. - +/** + * @file + * The internal M2nFrame IPF interface description. + * + * It can be used by stubs to generate code to push and pop M2n frames and to + * update object handles fields. It is also used by stack iterators. + * + * @sa \ref implementation_details + */ #include "Code_Emitter.h" #include "m2n.h" #include "open/types.h" -// Generate code to push an M2nFrame onto the stack -// The activation frame of the stub is used for the M2nFrame as are certain registers in this frame. -// The stub must preserve all preserved registers including pfs, gp, and b0 from entry to the stub to the time of push_m2n. -// The stub may use up to 8 inputs, the requested number of locals, and the requested number of outputs after push_m2n. -// method: the method to be associated with the M2nFrame or NULL for no association -// handles: does the stub want local handles or not -// num_on_stack: this number plus the current sp is the sp at entry to the stub (should be positive as stack grows down) -// num_local: the number of local registers above the M2N registers required by the stub -// num_outputs: the number of output registers required by the stub -// do_alloc: if false, the function should assume that the stacked register -// frame has been allocated, and no alloc instruction needs to be executed; it should also assume that ar.pfs is already saved at its proper place -// return: the register number for the first local, the outputs immediately follow the locals -// Note, the stub may use some of the 8 inputs as locals if it wants to +/** + * Generate code to push an M2nFrame onto the stack. + * The activation frame of the stub is used for the M2nFrame as are certain + * registers in this frame. + * The stub must preserve all preserved registers including pfs, gp, and b0 + * from entry to the stub to the time of push_m2n. + * The stub may use up to 8 inputs, the requested number of locals, and the + * requested number of outputs after push_m2n. + * + * @param method - the method to be associated with the M2nFrame + * or NULL for no association + * @param handles - does the stub want local handles or not + * @param num_on_stack - this number plus the current sp is the sp at entry to + * the stub (should be positive as stack grows down) + * @param num_local - the number of local registers above the M2N registers + * required by the stub + * @param num_outputs - the number of output registers required by the stub + * @param do_alloc - if false, the function should assume that the stacked + * register frame has been allocated, and no alloc + * instruction needs to be executed; it should also assume + * that ar.pfs is already saved at its proper place + * @return The register number for the first local, the outputs immediately follow + * the locals. + * @note The stub may use some of the 8 inputs as locals if it wants to. + */ unsigned m2n_gen_push_m2n(Merced_Code_Emitter*, Method_Handle method, frame_type current_frame_type, bool handles, unsigned num_on_stack, unsigned num_locals, unsigned num_outputs, bool do_alloc=true); enum M2nPreserveRet { MPR_None, MPR_Gr, MPR_Fr }; -// Generate code to pop the M2nFrame from the stack. -// This should be matched by a preceeding push_m2n in the stub. -// handles: should match the push_m2n handles argument, if true the generated code will free the handles. -// preserve_ret_regs: the number of return registers to preserve (starting with r8). -// Note that the pop restores the callee saves gp registers, pfs, gp, and b0 to the values that had at the push m2n; it does not restore sp. -// do_alloc: must have the same value as the corresponding m2n_gen_push_m2n() parameter -// target: if handles==true and the vm property vm.free_local_object_handles -// is also true, m2n_gen_pop_m2n will need to set a target in the emitter; -// target will be the number used. Otherwise, this parameter is ignored. -// out_reg: if handles==true and the vm property vm.free_local_object_handles -// is also true, m2n_gen_pop_m2n needs to know the first output register; out_reg is this register. Otherwise this parameter is ignored +/** + * Generate code to pop the M2nFrame from the stack. + * + * This should be matched by a preceeding push_m2n in the stub. + * + * @param handles - should match the push_m2n handles + * argument, if true the generated code will free + * the handles + * @param preserve_ret_regs - the number of return registers to preserve + * (starting with r8). + * @param do_alloc - must have the same value as the corresponding + * m2n_gen_push_m2n() parameter + * @param target - if handles==true and the vm property + * vm.free_local_object_handles is also true, + * m2n_gen_pop_m2n will need to set a target + * in the emitter target will be the number used; otherwise, + * this parameter is ignored + * @param out_reg - if handles==true and the vm property + * vm.free_local_object_handles is also true, + * m2n_gen_pop_m2n needs to know the first + * output register; out_reg is this register; + * otherwise this parameter is ignored + * + * @note The pop restores the callee saves gp registers, pfs, gp, and b0 to the + * values that had at the push m2n; it does not restore sp. + */ void m2n_gen_pop_m2n(Merced_Code_Emitter*, bool handles, M2nPreserveRet preserve_ret_regs, bool do_alloc=true, unsigned out_reg=0, int target=-1); -// Generate code to set the local handles of the M2nFrame that is also the current frame. -// Preserves all registers that are not used to store M2nFrame information. +/** + * Generate code to set the local handles of the M2nFrame that is also the + * current frame. + * Preserves all registers that are not used to store M2nFrame information. + */ void m2n_gen_set_local_handles(Merced_Code_Emitter*, unsigned src_reg); -// Generate code to set the local handles of the M2nFrame that is also the current frame. -// Preserves all registers that are not used to store M2nFrame information. +/** + * Generate code to set the local handles of the M2nFrame that is also the + * current frame. + * Preserves all registers that are not used to store M2nFrame information. + */ void m2n_gen_set_local_handles_imm(Merced_Code_Emitter*, uint64 imm_val); -// Generate code to save additional preserved registers not normally saved by push_m2n. -// The combination of push_m2n and save_extra_preserved_registers will save all preserved registers as needed by exception propogation. -// The code generated by this function must follow that of push_m2n. -// Note that this function uses the memory stack, expects the scratch area above sp, and leaves a scratch area above sp. +/** + * Generate code to save additional preserved registers not normally saved by + * push_m2n. + * The combination of push_m2n and + * save_extra_preserved_registers will save all preserved registers + * as needed by exception propogation. + * The code generated by this function must follow that of push_m2n. + * + * @note This function uses the memory stack, expects the scratch area above sp, + * and leaves a scratch area above sp. + */ void m2n_gen_save_extra_preserved_registers(Merced_Code_Emitter* emitter); -// returns the number of the last GR that the M2N frame uses +/** Returns the number of the last GR that the M2nFrame uses.*/ unsigned m2n_get_last_m2n_reg(); -// the following functions return the GR numbers where various things should be saved +/** + * The following functions return the GR numbers where various things + * should be saved. + */ unsigned m2n_get_pfs_save_reg(); unsigned m2n_get_return_save_reg(); unsigned m2n_get_gp_save_reg(); -// The IPF calling convention defines how to layout the arguments into words and then how to place -// these into gp registers, fp registers, or memory stack. This function returns a pointer to the -// nth word assuming it is either in a gp register or on the memory stack. +/** + * The IPF calling convention defines how to layout the arguments into words + * and then how to place these into gp registers, fp registers, or memory stack. + * This function returns a pointer to the nth word assuming it is either in a + * gp register or on the memory stack.*/ uint64* m2n_get_arg_word(M2nFrame*, unsigned n); -////////////////////////////////////////////////////////////////////////// -// Implementation details +/** + * @page implementation_details Implementation details + * + * An M2nFrame is always represented using the bsp value for + * register 32 of the frame. + * The information needed for the frame is stored in stacked local registers or + * on the memory stack. + * It can be accessed by computing the spill location from the bsp value or by + * retrieving the sp value and + */ -// An M2nFrame is always represented using the bsp value for register 32 of the frame -// The information needed for the frame is stored in stacked local registers or on the memory stack. -// It can be accessed by computing the spill location from the bsp value or by retrieving the sp value and - uint64* m2n_get_bsp(M2nFrame*); uint64* m2n_get_extra_saved(M2nFrame*); -// An M2nFrame will always have 8 input registers, some local stacked registers to save stuff, and some outputs +/** + * An M2nFrame will always have 8 input registers, some local + * stacked registers to save stuff, and some outputs. + */ #define M2N_NUMBER_ALIGNS 2 #define M2N_NUMBER_INPUTS 8 #define M2N_NUMBER_LOCALS 14 -// The following registers are used in M2nFrames to hold the indicated values -// The register numbers must be distinct, at least 40 (so they don't conflict with inputs), and less than 40+M2N_NUMBER_LOCALS +/** + * The following registers are used in M2nFrames to hold the indicated values. + * The register numbers must be distinct, at least 40 (so they don't conflict + * with inputs), and less than 40+M2N_NUMBER_LOCALS. + */ #define M2N_SAVED_PFS 40 #define M2N_SAVED_RETURN_ADDRESS 41 @@ -124,27 +181,34 @@ #define M2N_METHOD 52 #define M2N_FRAME_TYPE 53 -// Only the callee saves general registers are normally saved in the M2nFrame along with special things like pfs, return address, etc. -// The full set of preserved registers includes callee saves floating point and branch registers as well. -// These are saved, if requested, onto the memory stack as follows: -// +-------------------------+ -// | Saved f2 | -// Extra Saved ---> +-------------------------+ -// | Saved f3..f5 | -// +-------------------------+ -// | Saved f16..f31 | -// +-------------------------+ -// | Scratch area (8 bytes) | -// +-------------------------+ -// | Saved b1..b5 | -// +-------------------------+ -// | Saved ar.fpsr | -// +-------------------------+ -// | Saved ar.unat | -// +-------------------------+ -// | Saved ar.lc | -// +-------------------------+ - +/** + * Only the callee saves general registers are normally saved in + * the M2nFrame along with special things like pfs, + * return address, etc. + * The full set of preserved registers includes callee saves + * floating point and branch registers as well. + * + * These are saved, if requested, onto the memory stack as follows: + *
          + *                  +-------------------------+
          + *                  | Saved f2                |
          + * Extra Saved ---> +-------------------------+
          + *                  | Saved f3..f5            |
          + *                  +-------------------------+
          + *                  | Saved f16..f31          |
          + *                  +-------------------------+
          + *                  | Scratch area (8 bytes)  |
          + *                  +-------------------------+
          + *                  | Saved b1..b5            |
          + *                  +-------------------------+
          + *                  | Saved ar.fpsr           |
          + *                  +-------------------------+
          + *                  | Saved ar.unat           |
          + *                  +-------------------------+
          + *                  | Saved ar.lc             |
          + *                  +-------------------------+
          + * 
          + */ #define M2N_EXTRA_SAVES_SPACE 400 #ifdef _EM64T_