Index: vm/jitrino/src/vm/drl/DrlEMInterface.cpp =================================================================== --- vm/jitrino/src/vm/drl/DrlEMInterface.cpp (revision 453548) +++ vm/jitrino/src/vm/drl/DrlEMInterface.cpp (working copy) @@ -204,7 +204,6 @@ uint32* DrlEdgeMethodProfile::getCounter(uint32 key) const { uint32* counter = (uint32*)profileAccessInterface->edge_profiler_get_counter_addr(getHandle(), key); - assert(counter!=NULL); return counter; } Index: vm/jitrino/src/dynopt/EdgeProfiler.cpp =================================================================== --- vm/jitrino/src/dynopt/EdgeProfiler.cpp (revision 453548) +++ vm/jitrino/src/dynopt/EdgeProfiler.cpp (working copy) @@ -40,7 +40,7 @@ static bool isMethodTrivial( ControlFlowGraph& cfg ); static uint32 computeCheckSum( MemoryManager& mm, ControlFlowGraph& cfg, const StlSet& nodesToIgnore); -static void calculateProbsFromProfile(MemoryManager& mm, ControlFlowGraph& fg, const Edges& edges, DominatorTree* dt, LoopTree* lt, EdgeMethodProfile* profile, bool bcLevelProfiling, const StlSet& nodesToIgnore); +static bool calculateProbsFromProfile(MemoryManager& mm, ControlFlowGraph& fg, const Edges& edges, DominatorTree* dt, LoopTree* lt, EdgeMethodProfile* profile, bool bcLevelProfiling, const StlSet& nodesToIgnore); static Node* selectNodeToInstrument(IRManager& irm, Edge* edge); static void selectEdgesToInstrument(MemoryManager& mm, IRManager& irm, Edges& result, const StlSet& nodesToIgnore); static uint32 genKey( uint32 n, Edge* edge, bool bcLevel, bool debug); @@ -60,8 +60,6 @@ bool debug = Log::isEnabled(); LoopTree* lt = irm.getLoopTree(); - //printDotFile(irm, true, "inside"); - //printHIR(irm, true, "inside"); //set of nodes with out-edges are not taken into account during instrumentation //and checksum calculation @@ -138,7 +136,7 @@ if (isMethodTrivial(flowGraph) || !edgeProfilerMode || entryCount == 0) { // Annotate the CFG using static profiler heuristics. if (debug) { - Log::out()<<"Using static profiler to estimate graph"<getEdgeMethodProfile(mm, md); uint32 profileCheckSum = edgeProfile->getCheckSum(); - assert(profileCheckSum == cfgCheckSum); - if (cfgCheckSum != profileCheckSum) { - if (Log::isEnabled()) { - Log::out() << "ERROR: invalid CFG checksum!"; + //assert(profileCheckSum == cfgCheckSum); + if (cfgCheckSum == profileCheckSum) { + // Start propagating the CFG from instrumented edges. + Edges edges(mm); + selectEdgesToInstrument(mm, irm, edges, nodesToIgnore); + assert(edges.size() == edgeProfile->getNumCounters()); + bool bcLevelProfiling = false; //TODO: + bool res = calculateProbsFromProfile(mm, flowGraph, edges, dt, lt, edgeProfile, bcLevelProfiling, nodesToIgnore); + if (res) { + flowGraph.setEdgeProfile(true); } - return; } - - // Start propagating the CFG from instrumented edges. - Edges edges(mm); - selectEdgesToInstrument(mm, irm, edges, nodesToIgnore); - assert(edges.size() == edgeProfile->getNumCounters()); - bool bcLevelProfiling = false; //TODO: - calculateProbsFromProfile(mm, flowGraph, edges, dt, lt, edgeProfile, bcLevelProfiling, nodesToIgnore); - flowGraph.setEdgeProfile(true); - + if (!flowGraph.hasEdgeProfile()) { + if (debug) { + Log::out()<<"DynProf failed: using static profiler to estimate graph!"<& nodesToIgnore) { @@ -238,7 +236,12 @@ for (Edges::const_iterator it = pEdges.begin(), end = pEdges.end(); it!=end; ++it, ++n) { Edge* edge = *it; uint32 key = genKey(n, edge, bcLevelProfiling, debug); - uint32 freq = *profile->getCounter(key); + uint32* counterAddr = profile->getCounter(key); + assert(counterAddr!=NULL); + if (counterAddr == NULL) { + return false; + } + uint32 freq = *counterAddr; setEdgeFreq(edgeFreqs, edge, freq, debug); } @@ -388,7 +391,7 @@ } } -#ifdef _DEBUG +#if 0 //2.99 debug check : check that every child node in dom-tree that is in the same loop as parent //has nodeFreq <= parent freq if (debug) { @@ -425,14 +428,14 @@ double edgeFreq =edgeFreqs[edge->getId()]; assert(edgeFreq!=-1); double edgeProb = nodeFreq == 0 ? 0 : edgeFreq / nodeFreq ; - assert(edgeProb >= 0 && edgeProb <= 1); +// assert(edgeProb >= 0 && edgeProb <= 1); edge->setEdgeProb(edgeProb); } } if (debug) { Log::out()<<"Finished probs calculation"; } - + return true; } // @@ -687,30 +690,19 @@ uint32 key = 0; if (bcLevel) { assert(0); //TODO: - /*Node* node = edge->getSourceNode(); - Inst* lastInst = node->getLastInst(); - - if( lastInst->getOpcode() == Op_Branch || lastInst->getOpcode() == Op_Jump ){ - BranchInst* br = (BranchInst*)lastInst; - const uint32 bcAddr = getBcAddr(br); - Node* targetNode = edge->getTargetNode(); - - // Only instrument valid taken branches. - if( ( bcAddr != 0 ) && ( br->getTargetLabel() == targetNode->getFirstInst() ) ){ - assert( (bcAddr & 0xffff0000) != 0 ); - return (uint32)bcAddr; - } - } - return 0; - }*/ } else { + //TODO: this algorithm is not 100% effective: we can't rely on edges order in CFG uint32 edgePos = 0; const Edges& edges = edge->getSourceNode()->getOutEdges(); - for (Edges::const_iterator it = edges.begin(), end = edges.end(); it!=end; ++it, edgePos++) { + for (Edges::const_iterator it = edges.begin(), end = edges.end(); it!=end; ++it) { Edge* outEdge = *it; if (outEdge == edge) { break; } + if (outEdge->isDispatchEdge()) { //dispatch edge order is the reason of the most of the edge ordering errors + continue; + } + edgePos++; } key = pos + (edgePos << 16);